rev |
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nuclear@1
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1 #include <stdint.h>
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nuclear@0
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2 #include "vdp.h"
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nuclear@6
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3 #include "io.h"
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nuclear@9
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4 #include "pad.h"
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nuclear@9
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5 #include "intr.h"
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nuclear@5
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6 #include "tun_data.h"
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nuclear@0
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7
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nuclear@5
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8 #define NAMETAB_A 6
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nuclear@5
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9 #define NAMETAB_B 6
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nuclear@5
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10
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nuclear@5
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11 void load_pattern(int idx, void *data);
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nuclear@5
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12 void set_tile(int nametab_idx, int x, int y, int tile_idx, int palidx);
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nuclear@5
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13
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nuclear@5
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14 #define CYCLE_BEG 1
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nuclear@5
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15 #define CYCLE_END 14
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nuclear@5
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16 static uint16_t pal[16] = {
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nuclear@5
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17 VDP_PACK_RGB(0, 0, 0), /* 0: fixed */
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nuclear@5
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18 VDP_PACK_RGB(0, 0, 0), /* 1: cycle start */
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nuclear@5
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19 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
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nuclear@5
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20 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
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nuclear@5
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21 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
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nuclear@5
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22 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
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nuclear@5
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23 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
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nuclear@5
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24 VDP_PACK_RGB(0, 0, 0), /* 12: \ */
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nuclear@5
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25 VDP_PACK_RGB(7, 0, 3), /* 13: > beam */
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nuclear@5
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26 VDP_PACK_RGB(0, 0, 0), /* 14: / cycle end */
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nuclear@5
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27 VDP_PACK_RGB(7, 0, 3) /* 15: fixed */
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nuclear@4
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28 };
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nuclear@4
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29
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nuclear@4
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30
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nuclear@0
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31 int main(void)
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nuclear@0
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32 {
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nuclear@4
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33 int i, j;
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nuclear@4
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34
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nuclear@0
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35 vdp_init();
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nuclear@0
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36
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nuclear@6
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37 if(IO_REG_VER & IO_VER_PAL) {
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nuclear@6
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38 vdp_setreg(VDP_REG_MODE2, vdp_getreg(VDP_REG_MODE2) | VDP_MODE2_V30CELL);
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nuclear@6
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39 }
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nuclear@5
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40
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nuclear@5
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41 vdp_begin_palette(0, 0);
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nuclear@5
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42 for(i=0; i<16; i++) {
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nuclear@5
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43 VDP_PORT_DATA = pal[i];
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nuclear@5
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44 }
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nuclear@0
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45
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nuclear@5
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46 for(i=0; i<tun_xtiles * tun_ytiles; i++) {
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nuclear@5
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47 load_pattern(i, tun_tiles[i]);
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nuclear@5
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48 }
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nuclear@4
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49
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nuclear@5
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50 vdp_set_nametab_idx(VDP_PLANE_A, NAMETAB_A);
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nuclear@5
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51 vdp_set_nametab_idx(VDP_PLANE_B, NAMETAB_B);
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nuclear@4
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52
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nuclear@5
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53 for(i=0; i<tun_ytiles; i++) {
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nuclear@5
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54 for(j=0; j<tun_xtiles; j++) {
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nuclear@5
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55 set_tile(NAMETAB_A, j, i, i * tun_xtiles + j, 0);
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nuclear@4
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56 }
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nuclear@4
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57 }
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nuclear@4
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58
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nuclear@4
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59 //vdp_enable_hintr(12);
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nuclear@5
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60 vdp_enable_vintr();
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nuclear@1
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61
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nuclear@8
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62 for(;;) {
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nuclear@9
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63 pad_update(0);
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nuclear@8
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64
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nuclear@9
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65 if(pad_pressed(0, IO_PAD_C)) {
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nuclear@9
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66 disable_intr();
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nuclear@9
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67 vdp_setreg(VDP_REG_MODE2, vdp_getreg(VDP_REG_MODE2) ^ VDP_MODE2_V30CELL);
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nuclear@9
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68 enable_intr();
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nuclear@8
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69 }
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nuclear@8
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70
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nuclear@8
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71 vdp_wait_vblank();
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nuclear@8
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72 }
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nuclear@0
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73
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nuclear@0
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74 return 0;
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nuclear@0
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75 }
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nuclear@1
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76
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nuclear@4
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77 void load_pattern(int idx, void *data)
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nuclear@4
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78 {
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nuclear@4
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79 int i;
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nuclear@4
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80 uint32_t *ptr = data;
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nuclear@4
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81 uint16_t addr = idx << 5;
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nuclear@4
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82 vdp_setup_access(addr, VDP_MEM_WRITE, VDP_MEM_VRAM);
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nuclear@4
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83
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nuclear@4
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84 for(i=0; i<16; i++) {
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nuclear@4
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85 VDP_PORT_DATA32 = *ptr++;
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nuclear@4
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86 }
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nuclear@4
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87 }
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nuclear@4
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88
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nuclear@5
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89 void set_tile(int nametab_idx, int x, int y, int tile_idx, int palidx)
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nuclear@4
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90 {
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nuclear@4
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91 uint16_t tile_ent, addr;
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nuclear@4
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92
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nuclear@4
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93 tile_ent = vdp_nametab_entry(tile_idx, palidx, VDP_TILE_LOW_PRIO);
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nuclear@4
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94
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nuclear@5
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95 addr = vdp_nametab_addr(nametab_idx) + (y * 64 + x) * 2;
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nuclear@4
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96 vdp_setup_access(addr, VDP_MEM_WRITE, VDP_MEM_VRAM);
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nuclear@4
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97 VDP_PORT_DATA = tile_ent;
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nuclear@4
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98 }
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nuclear@5
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99
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nuclear@5
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100 void vblank_handler(void)
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nuclear@5
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101 {
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nuclear@5
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102 int idx = CYCLE_BEG;
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nuclear@8
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103 uint16_t first;
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nuclear@8
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104
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nuclear@8
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105 first = pal[idx];
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nuclear@5
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106
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nuclear@5
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107 vdp_begin_palette(0, idx);
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nuclear@5
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108 while(idx < CYCLE_END) {
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nuclear@5
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109 pal[idx] = pal[idx + 1];
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nuclear@5
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110 VDP_PORT_DATA = pal[idx];
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nuclear@5
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111 ++idx;
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nuclear@5
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112 }
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nuclear@5
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113 pal[idx] = first;
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nuclear@5
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114 VDP_PORT_DATA = pal[idx];
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nuclear@5
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115 }
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