megadrive_test2
view src/main.c @ 9:6ecf2f3ff05a
- better pad input handling
- switch between 28 and 30 vertical tiles by pressing C
author | John Tsiombikas <nuclear@member.fsf.org> |
---|---|
date | Sat, 24 Jun 2017 00:33:10 +0300 |
parents | 403367d5df5a |
children | ca7108a82867 |
line source
1 #include <stdint.h>
2 #include "vdp.h"
3 #include "io.h"
4 #include "pad.h"
5 #include "intr.h"
6 #include "tun_data.h"
8 #define NAMETAB_A 6
9 #define NAMETAB_B 6
11 void load_pattern(int idx, void *data);
12 void set_tile(int nametab_idx, int x, int y, int tile_idx, int palidx);
14 #define CYCLE_BEG 1
15 #define CYCLE_END 14
16 static uint16_t pal[16] = {
17 VDP_PACK_RGB(0, 0, 0), /* 0: fixed */
18 VDP_PACK_RGB(0, 0, 0), /* 1: cycle start */
19 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
20 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
21 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
22 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
23 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
24 VDP_PACK_RGB(0, 0, 0), /* 12: \ */
25 VDP_PACK_RGB(7, 0, 3), /* 13: > beam */
26 VDP_PACK_RGB(0, 0, 0), /* 14: / cycle end */
27 VDP_PACK_RGB(7, 0, 3) /* 15: fixed */
28 };
31 int main(void)
32 {
33 int i, j;
35 vdp_init();
37 if(IO_REG_VER & IO_VER_PAL) {
38 vdp_setreg(VDP_REG_MODE2, vdp_getreg(VDP_REG_MODE2) | VDP_MODE2_V30CELL);
39 }
41 vdp_begin_palette(0, 0);
42 for(i=0; i<16; i++) {
43 VDP_PORT_DATA = pal[i];
44 }
46 for(i=0; i<tun_xtiles * tun_ytiles; i++) {
47 load_pattern(i, tun_tiles[i]);
48 }
50 vdp_set_nametab_idx(VDP_PLANE_A, NAMETAB_A);
51 vdp_set_nametab_idx(VDP_PLANE_B, NAMETAB_B);
53 for(i=0; i<tun_ytiles; i++) {
54 for(j=0; j<tun_xtiles; j++) {
55 set_tile(NAMETAB_A, j, i, i * tun_xtiles + j, 0);
56 }
57 }
59 //vdp_enable_hintr(12);
60 vdp_enable_vintr();
62 for(;;) {
63 pad_update(0);
65 if(pad_pressed(0, IO_PAD_C)) {
66 disable_intr();
67 vdp_setreg(VDP_REG_MODE2, vdp_getreg(VDP_REG_MODE2) ^ VDP_MODE2_V30CELL);
68 enable_intr();
69 }
71 vdp_wait_vblank();
72 }
74 return 0;
75 }
77 void load_pattern(int idx, void *data)
78 {
79 int i;
80 uint32_t *ptr = data;
81 uint16_t addr = idx << 5;
82 vdp_setup_access(addr, VDP_MEM_WRITE, VDP_MEM_VRAM);
84 for(i=0; i<16; i++) {
85 VDP_PORT_DATA32 = *ptr++;
86 }
87 }
89 void set_tile(int nametab_idx, int x, int y, int tile_idx, int palidx)
90 {
91 uint16_t tile_ent, addr;
93 tile_ent = vdp_nametab_entry(tile_idx, palidx, VDP_TILE_LOW_PRIO);
95 addr = vdp_nametab_addr(nametab_idx) + (y * 64 + x) * 2;
96 vdp_setup_access(addr, VDP_MEM_WRITE, VDP_MEM_VRAM);
97 VDP_PORT_DATA = tile_ent;
98 }
100 void vblank_handler(void)
101 {
102 int idx = CYCLE_BEG;
103 uint16_t first;
105 first = pal[idx];
107 vdp_begin_palette(0, idx);
108 while(idx < CYCLE_END) {
109 pal[idx] = pal[idx + 1];
110 VDP_PORT_DATA = pal[idx];
111 ++idx;
112 }
113 pal[idx] = first;
114 VDP_PORT_DATA = pal[idx];
115 }