megadrive_test2
view src/main.c @ 8:403367d5df5a
added 8x8 font data
author | John Tsiombikas <nuclear@member.fsf.org> |
---|---|
date | Thu, 22 Jun 2017 07:44:48 +0300 |
parents | df2c6b3c6f2e |
children | 6ecf2f3ff05a |
line source
1 #include <stdint.h>
2 #include "vdp.h"
3 #include "io.h"
4 #include "tun_data.h"
6 #define NAMETAB_A 6
7 #define NAMETAB_B 6
9 void load_pattern(int idx, void *data);
10 void set_tile(int nametab_idx, int x, int y, int tile_idx, int palidx);
12 #define CYCLE_BEG 1
13 #define CYCLE_END 14
14 static uint16_t pal[16] = {
15 VDP_PACK_RGB(0, 0, 0), /* 0: fixed */
16 VDP_PACK_RGB(0, 0, 0), /* 1: cycle start */
17 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
18 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
19 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
20 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
21 VDP_PACK_RGB(0, 0, 0), VDP_PACK_RGB(0, 0, 0),
22 VDP_PACK_RGB(0, 0, 0), /* 12: \ */
23 VDP_PACK_RGB(7, 0, 3), /* 13: > beam */
24 VDP_PACK_RGB(0, 0, 0), /* 14: / cycle end */
25 VDP_PACK_RGB(7, 0, 3) /* 15: fixed */
26 };
28 static int running = 1;
31 int main(void)
32 {
33 int i, j;
35 vdp_init();
37 if(IO_REG_VER & IO_VER_PAL) {
38 vdp_setreg(VDP_REG_MODE2, vdp_getreg(VDP_REG_MODE2) | VDP_MODE2_V30CELL);
39 }
41 vdp_begin_palette(0, 0);
42 for(i=0; i<16; i++) {
43 VDP_PORT_DATA = pal[i];
44 }
45 vdp_set_bgcolor(0, 0);
47 for(i=0; i<tun_xtiles * tun_ytiles; i++) {
48 load_pattern(i, tun_tiles[i]);
49 }
51 vdp_set_nametab_idx(VDP_PLANE_A, NAMETAB_A);
52 vdp_set_nametab_idx(VDP_PLANE_B, NAMETAB_B);
54 for(i=0; i<tun_ytiles; i++) {
55 for(j=0; j<tun_xtiles; j++) {
56 set_tile(NAMETAB_A, j, i, i * tun_xtiles + j, 0);
57 }
58 }
60 //vdp_enable_hintr(12);
61 vdp_enable_vintr();
63 for(;;) {
64 uint16_t bnstate = io_readpad(0);
66 if(bnstate & IO_PAD_START) {
67 running = !running;
68 }
70 vdp_wait_vblank();
71 }
73 return 0;
74 }
76 void load_pattern(int idx, void *data)
77 {
78 int i;
79 uint32_t *ptr = data;
80 uint16_t addr = idx << 5;
81 vdp_setup_access(addr, VDP_MEM_WRITE, VDP_MEM_VRAM);
83 for(i=0; i<16; i++) {
84 VDP_PORT_DATA32 = *ptr++;
85 }
86 }
88 void set_tile(int nametab_idx, int x, int y, int tile_idx, int palidx)
89 {
90 uint16_t tile_ent, addr;
92 tile_ent = vdp_nametab_entry(tile_idx, palidx, VDP_TILE_LOW_PRIO);
94 addr = vdp_nametab_addr(nametab_idx) + (y * 64 + x) * 2;
95 vdp_setup_access(addr, VDP_MEM_WRITE, VDP_MEM_VRAM);
96 VDP_PORT_DATA = tile_ent;
97 }
99 void vblank_handler(void)
100 {
101 int idx = CYCLE_BEG;
102 uint16_t first;
104 if(!running) return;
106 first = pal[idx];
108 vdp_begin_palette(0, idx);
109 while(idx < CYCLE_END) {
110 pal[idx] = pal[idx + 1];
111 VDP_PORT_DATA = pal[idx];
112 ++idx;
113 }
114 pal[idx] = first;
115 VDP_PORT_DATA = pal[idx];
116 }