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1 @ vi:set filetype=armasm:
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2 .arch armv5te
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3 .cpu arm946e-s
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4 .section ".crt0","ax"
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5 .global _start
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6 .align 4
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7 .arm
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8 _start:
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9 mov r0, #0x04000000 @ IME = 0;
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10 str r0, [r0, #0x208]
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11
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12 @ set sensible stacks to allow bios call
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13
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14 mov r0, #0x13 @ Switch to SVC Mode
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15 msr cpsr, r0
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16 mov r1,#0x03000000
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17 sub r1,r1,#0x1000
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18 mov sp,r1
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19 mov r0, #0x1F @ Switch to System Mode
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20 msr cpsr, r0
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21 sub r1,r1,#0x100
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22 mov sp,r1
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23
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24 ldr r3, =mpu_setup
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25 blx r3
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26
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27 mov r0, #0x12 @ Switch to IRQ Mode
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28 msr cpsr, r0
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29 ldr sp, =__sp_irq @ Set IRQ stack
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30
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31 mov r0, #0x13 @ Switch to SVC Mode
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32 msr cpsr, r0
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33 ldr sp, =__sp_svc @ Set SVC stack
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34
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35 mov r0, #0x1F @ Switch to System Mode
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36 msr cpsr, r0
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37 ldr sp, =__sp_usr @ Set user stack
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38
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39 mov r12, #0x4000000 @ Read system ROM status (NTR/TWL)
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40 ldrb r11, [r12,r12,lsr #12]
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41 and r11, r11, #0x3
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42
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43 b skip_sync
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44
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45 mov r9, #(0x0<<8) @ Synchronize with ARM7
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46 str r9, [r12, #0x180]
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47 mov r9, #0x9
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48 bl IPCSync
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49 mov r9, #(0xA<<8)
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50 str r9, [r12, #0x180]
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51 mov r9, #0xB
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52 bl IPCSync
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53 mov r9, #(0xC<<8)
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54 str r9, [r12, #0x180]
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55 mov r9, #0xD
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56 bl IPCSync
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57 mov r9, r11, lsl #8
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58 str r9, [r12, #0x180]
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59 mov r9, #0
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60 bl IPCSync
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61 str r9, [r12, #0x180]
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62
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63 skip_sync:
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64
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65 ldr r1, =__itcm_lma @ Copy instruction tightly coupled memory (itcm section) from LMA to VMA
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66 ldr r2, =__itcm_start
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67 ldr r4, =__itcm_end
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68 bl CopyMemCheck
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69
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70 ldr r1, =__vectors_lma @ Copy reserved vectors area (itcm section) from LMA to VMA
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71 ldr r2, =__vectors_start
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72 ldr r4, =__vectors_end
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73 bl CopyMemCheck
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74
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75 ldr r1, =__dtcm_lma @ Copy data tightly coupled memory (dtcm section) from LMA to VMA
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76 ldr r2, =__dtcm_start
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77 ldr r4, =__dtcm_end
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78 bl CopyMemCheck
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79
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80 cmp r11, #1
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81 ldrne r10, =__end__ @ (DS mode) heap start
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82 ldreq r10, =__twl_end__ @ (DSi mode) heap start
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83
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84 ldr r0, =__bss_start__ @ Clear BSS section
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85 ldr r1, =__bss_end__
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86 sub r1, r1, r0
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87 bl ClearMem
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88
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89 ldr r0, =__sbss_start @ Clear SBSS section
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90 ldr r1, =__sbss_end
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91 sub r1, r1, r0
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92 bl ClearMem
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93
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94 cmp r11, #1
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95 bne NotTWL
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96 ldr r9, =__dsimode @ set DSi mode flag
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97 strb r11, [r9]
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98
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99 @ Copy TWL area (arm9i section) from LMA to VMA
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100 ldr r1, =0x02ffe1c8 @ Get ARM9i LMA from header
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101 ldr r1, [r1]
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102
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103 ldr r2, =__arm9i_start__
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104 cmp r1, r2 @ skip copy if LMA=VMA
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105 ldrne r4, =__arm9i_end__
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106 blne CopyMemCheck
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107
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108 ldr r0, =__twl_bss_start__ @ Clear TWL BSS section
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109 ldr r1, =__twl_bss_end__
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110 sub r1, r1, r0
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111 bl ClearMem
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112
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113 NotTWL:
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114 ldr r0, =__secure_area__
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115 ldr r3, =main
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116 bx r3 @ jump to user code
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117 infloop:
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118 b infloop
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119
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120
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121
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122 @---------------------------------------------------------------------------------
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123 @ Clear memory to 0x00 if length != 0
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124 @ r0 = Start Address
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125 @ r1 = Length
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126 @---------------------------------------------------------------------------------
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127 ClearMem:
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128 @---------------------------------------------------------------------------------
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129 mov r2, #3 @ Round down to nearest word boundary
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130 add r1, r1, r2 @ Shouldn't be needed
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131 bics r1, r1, r2 @ Clear 2 LSB (and set Z)
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132 bxeq lr @ Quit if copy size is 0
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133
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134 mov r2, #0
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135 ClrLoop:
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136 stmia r0!, {r2}
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137 subs r1, r1, #4
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138 bne ClrLoop
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139
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140 bx lr
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141
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142 @---------------------------------------------------------------------------------
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143 @ Copy memory if length != 0
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144 @ r1 = Source Address
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145 @ r2 = Dest Address
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146 @ r4 = Dest Address + Length
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147 @---------------------------------------------------------------------------------
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148 CopyMemCheck:
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149 @---------------------------------------------------------------------------------
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150 sub r3, r4, r2 @ Is there any data to copy?
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151 @---------------------------------------------------------------------------------
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152 @ Copy memory
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153 @ r1 = Source Address
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154 @ r2 = Dest Address
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155 @ r3 = Length
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156 @---------------------------------------------------------------------------------
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157 CopyMem:
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158 @---------------------------------------------------------------------------------
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159 mov r0, #3 @ These commands are used in cases where
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160 add r3, r3, r0 @ the length is not a multiple of 4,
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161 bics r3, r3, r0 @ even though it should be.
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162 bxeq lr @ Length is zero, so exit
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163 CIDLoop:
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164 ldmia r1!, {r0}
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165 stmia r2!, {r0}
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166 subs r3, r3, #4
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167 bne CIDLoop
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168
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169 bx lr
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170
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171 @ Synchronize with ARM7
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172 IPCSync:
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173 ldr r10, [r12, #0x180]
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174 and r10, r10, #0xF
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175 cmp r10, r9
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176 bne IPCSync
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177 bx lr
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178
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179
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180 .align
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181 .pool
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182
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183 .data
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184 .global __dsimode
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185 __dsimode:
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186 .word 0
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187
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188 .section ".secure","a"
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189 .align 2
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190 .global __secure_area__
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191 __secure_area__:
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192 .space 2048, 0
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