nds_test2
view src/startup/arm9entry.s @ 0:abcaf667f2bd
initial commit (3d + 2d)
| author | John Tsiombikas <nuclear@member.fsf.org> |
|---|---|
| date | Sun, 28 Jan 2018 20:05:26 +0200 |
| parents | |
| children |
line source
1 @ vi:set filetype=armasm:
2 .arch armv5te
3 .cpu arm946e-s
4 .section ".crt0","ax"
5 .global _start
6 .align 4
7 .arm
8 _start:
9 mov r0, #0x04000000 @ IME = 0;
10 str r0, [r0, #0x208]
12 @ set sensible stacks to allow bios call
14 mov r0, #0x13 @ Switch to SVC Mode
15 msr cpsr, r0
16 mov r1,#0x03000000
17 sub r1,r1,#0x1000
18 mov sp,r1
19 mov r0, #0x1F @ Switch to System Mode
20 msr cpsr, r0
21 sub r1,r1,#0x100
22 mov sp,r1
24 ldr r3, =mpu_setup
25 blx r3
27 mov r0, #0x12 @ Switch to IRQ Mode
28 msr cpsr, r0
29 ldr sp, =__sp_irq @ Set IRQ stack
31 mov r0, #0x13 @ Switch to SVC Mode
32 msr cpsr, r0
33 ldr sp, =__sp_svc @ Set SVC stack
35 mov r0, #0x1F @ Switch to System Mode
36 msr cpsr, r0
37 ldr sp, =__sp_usr @ Set user stack
39 mov r12, #0x4000000 @ Read system ROM status (NTR/TWL)
40 ldrb r11, [r12,r12,lsr #12]
41 and r11, r11, #0x3
43 b skip_sync
45 mov r9, #(0x0<<8) @ Synchronize with ARM7
46 str r9, [r12, #0x180]
47 mov r9, #0x9
48 bl IPCSync
49 mov r9, #(0xA<<8)
50 str r9, [r12, #0x180]
51 mov r9, #0xB
52 bl IPCSync
53 mov r9, #(0xC<<8)
54 str r9, [r12, #0x180]
55 mov r9, #0xD
56 bl IPCSync
57 mov r9, r11, lsl #8
58 str r9, [r12, #0x180]
59 mov r9, #0
60 bl IPCSync
61 str r9, [r12, #0x180]
63 skip_sync:
65 ldr r1, =__itcm_lma @ Copy instruction tightly coupled memory (itcm section) from LMA to VMA
66 ldr r2, =__itcm_start
67 ldr r4, =__itcm_end
68 bl CopyMemCheck
70 ldr r1, =__vectors_lma @ Copy reserved vectors area (itcm section) from LMA to VMA
71 ldr r2, =__vectors_start
72 ldr r4, =__vectors_end
73 bl CopyMemCheck
75 ldr r1, =__dtcm_lma @ Copy data tightly coupled memory (dtcm section) from LMA to VMA
76 ldr r2, =__dtcm_start
77 ldr r4, =__dtcm_end
78 bl CopyMemCheck
80 cmp r11, #1
81 ldrne r10, =__end__ @ (DS mode) heap start
82 ldreq r10, =__twl_end__ @ (DSi mode) heap start
84 ldr r0, =__bss_start__ @ Clear BSS section
85 ldr r1, =__bss_end__
86 sub r1, r1, r0
87 bl ClearMem
89 ldr r0, =__sbss_start @ Clear SBSS section
90 ldr r1, =__sbss_end
91 sub r1, r1, r0
92 bl ClearMem
94 cmp r11, #1
95 bne NotTWL
96 ldr r9, =__dsimode @ set DSi mode flag
97 strb r11, [r9]
99 @ Copy TWL area (arm9i section) from LMA to VMA
100 ldr r1, =0x02ffe1c8 @ Get ARM9i LMA from header
101 ldr r1, [r1]
103 ldr r2, =__arm9i_start__
104 cmp r1, r2 @ skip copy if LMA=VMA
105 ldrne r4, =__arm9i_end__
106 blne CopyMemCheck
108 ldr r0, =__twl_bss_start__ @ Clear TWL BSS section
109 ldr r1, =__twl_bss_end__
110 sub r1, r1, r0
111 bl ClearMem
113 NotTWL:
114 ldr r0, =__secure_area__
115 ldr r3, =main
116 bx r3 @ jump to user code
117 infloop:
118 b infloop
122 @---------------------------------------------------------------------------------
123 @ Clear memory to 0x00 if length != 0
124 @ r0 = Start Address
125 @ r1 = Length
126 @---------------------------------------------------------------------------------
127 ClearMem:
128 @---------------------------------------------------------------------------------
129 mov r2, #3 @ Round down to nearest word boundary
130 add r1, r1, r2 @ Shouldn't be needed
131 bics r1, r1, r2 @ Clear 2 LSB (and set Z)
132 bxeq lr @ Quit if copy size is 0
134 mov r2, #0
135 ClrLoop:
136 stmia r0!, {r2}
137 subs r1, r1, #4
138 bne ClrLoop
140 bx lr
142 @---------------------------------------------------------------------------------
143 @ Copy memory if length != 0
144 @ r1 = Source Address
145 @ r2 = Dest Address
146 @ r4 = Dest Address + Length
147 @---------------------------------------------------------------------------------
148 CopyMemCheck:
149 @---------------------------------------------------------------------------------
150 sub r3, r4, r2 @ Is there any data to copy?
151 @---------------------------------------------------------------------------------
152 @ Copy memory
153 @ r1 = Source Address
154 @ r2 = Dest Address
155 @ r3 = Length
156 @---------------------------------------------------------------------------------
157 CopyMem:
158 @---------------------------------------------------------------------------------
159 mov r0, #3 @ These commands are used in cases where
160 add r3, r3, r0 @ the length is not a multiple of 4,
161 bics r3, r3, r0 @ even though it should be.
162 bxeq lr @ Length is zero, so exit
163 CIDLoop:
164 ldmia r1!, {r0}
165 stmia r2!, {r0}
166 subs r3, r3, #4
167 bne CIDLoop
169 bx lr
171 @ Synchronize with ARM7
172 IPCSync:
173 ldr r10, [r12, #0x180]
174 and r10, r10, #0xF
175 cmp r10, r9
176 bne IPCSync
177 bx lr
180 .align
181 .pool
183 .data
184 .global __dsimode
185 __dsimode:
186 .word 0
188 .section ".secure","a"
189 .align 2
190 .global __secure_area__
191 __secure_area__:
192 .space 2048, 0