megadrive_test1

annotate src/vdp.h @ 6:862f8a034cae

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expanding the megadrive code
author John Tsiombikas <nuclear@member.fsf.org>
date Sat, 11 Feb 2017 08:56:42 +0200
parents f99eab59e7dc
children 8253942b0a1a
rev   line source
nuclear@4 1 #ifndef VDP_H_
nuclear@4 2 #define VDP_H_
nuclear@4 3
nuclear@4 4 #include <stdint.h>
nuclear@4 5
nuclear@4 6 #define VDP_PORT_DATA (*(volatile uint16_t*)0xc00000)
nuclear@4 7 #define VDP_PORT_DATA32 (*(volatile uint32_t*)0xc00000)
nuclear@4 8 #define VDP_PORT_CTL (*(volatile uint16_t*)0xc00004)
nuclear@4 9 #define VDP_PORT_CTL32 (*(volatile uint32_t*)0xc00004)
nuclear@4 10 #define VDP_PORT_HVCOUNT (*(volatile uint16_t*)0xc00008)
nuclear@4 11 #define VDP_PORT_PSG (*(volatile uint16_t*)0xc00010)
nuclear@4 12
nuclear@6 13 /* registers */
nuclear@6 14 #define VDP_REG_MODE1 0
nuclear@6 15 #define VDP_REG_MODE2 1
nuclear@6 16 #define VDP_REG_PADDR_A 2
nuclear@6 17 #define VDP_REG_PADDR_WIN 3
nuclear@6 18 #define VDP_REG_PADDR_B 4
nuclear@6 19 #define VDP_REG_SPRITE 5
nuclear@6 20 #define VDP_REG_BGCOLOR 7
nuclear@6 21 #define VDP_REG_HINT 10
nuclear@6 22 #define VDP_REG_MODE3 11
nuclear@6 23 #define VDP_REG_MODE4 12
nuclear@6 24 #define VDP_REG_HSCROLL 13
nuclear@6 25 #define VDP_REG_AUTOINC 15
nuclear@6 26 #define VDP_REG_SCROLL_SIZE 16
nuclear@6 27 #define VDP_REG_WINXPOS 17
nuclear@6 28 #define VDP_REG_WINYPOS 18
nuclear@6 29 #define VDP_REG_DMALEN_LOW 19
nuclear@6 30 #define VDP_REG_DMALEN_HIGH 20
nuclear@6 31 #define VDP_REG_DMA_SADDR_LOW 21
nuclear@6 32 #define VDP_REG_DMA_SADDR_MID 22
nuclear@6 33 #define VDP_REG_DMA_SADDR_HIGH 23
nuclear@6 34
nuclear@4 35 /* control register read flags */
nuclear@4 36 #define VDP_CTL_PAL_BIT 0x0001
nuclear@4 37 #define VDP_CTL_HBLANK_BIT 0x0002
nuclear@4 38 #define VDP_CTL_VBLANK_BIT 0x0004
nuclear@4 39 #define VDP_CTL_DT3_BIT 0x0008
nuclear@4 40 #define VDP_CTL_ODD_FRAME_BIT 0x0010
nuclear@4 41 #define VDP_CTL_COLIDE_BIT 0x0020
nuclear@4 42 #define VDP_CTL_SPRITE_OVF_BIT 0x0040
nuclear@4 43 #define VDP_CTL_FRAME_BIT 0x0080
nuclear@4 44 #define VDP_CTL_FIFO_FULL_BIT 0x0100
nuclear@4 45 #define VDP_CTL_FIFO_EMPTY_BIT 0x0200
nuclear@4 46
nuclear@4 47 /* control register write flags (RSET) */
nuclear@4 48 #define VDP_CTL_REGSEL_MASK 0x1f00
nuclear@4 49 #define VDP_CTL_DATA_MASK 0x00ff
nuclear@4 50
nuclear@4 51 #define VDP_RSET(reg, val) \
nuclear@4 52 (0x8000 | (VDP_CTL_REGSEL_MASK & ((uint16_t)(reg) << 8)) | \
nuclear@4 53 (VDP_CTL_DATA_MASK & (uint16_t)(val)))
nuclear@4 54
nuclear@5 55 #define VDP_SET_REG(reg, val) \
nuclear@5 56 do { VDP_PORT_CTL = VDP_RSET(reg, val); } while(0)
nuclear@5 57
nuclear@5 58 #define VDP_REG0_BASE 4
nuclear@5 59 #define VDP_REG0_HVCNT_BIT 0x02
nuclear@5 60 #define VDP_REG0_HINTR_BIT 0x10
nuclear@5 61
nuclear@5 62 #define VDP_REG1_BASE 4
nuclear@5 63 #define VDP_REG1_30CELL_BIT 0x08
nuclear@5 64 #define VDP_REG1_DMA_BIT 0x10
nuclear@5 65 #define VDP_REG1_VINTR_BIT 0x20
nuclear@5 66 #define VDP_REG1_DISP_BIT 0x40
nuclear@6 67 #define VDP_REG1_XVRAM_BIT 0x80
nuclear@5 68
nuclear@4 69 #define VDP_MODE_WR_BIT 1
nuclear@4 70
nuclear@4 71 #define VDP_VRAM_WR 1
nuclear@4 72 #define VDP_CRAM_WR 3
nuclear@4 73
nuclear@6 74 #define VDP_DMA_MEM_TO_VRAM 0
nuclear@6 75 #define VDP_DMA_VRAM_FILL 2
nuclear@6 76 #define VDP_DMA_VRAM_COPY 3
nuclear@6 77
nuclear@4 78 #define VDP_ADDRSET(addr, mode) /* TODO */
nuclear@4 79
nuclear@5 80 #define VDP_CRAM_ADDR32(addr) (0xc0000000 | ((uint32_t)(addr) << 16))
nuclear@5 81
nuclear@5 82 #define VDP_SET_CRAM_ADDR(addr) \
nuclear@5 83 do { VDP_PORT_CTL32 = VDP_CRAM_ADDR32(addr); } while(0)
nuclear@5 84
nuclear@6 85 #define VDP_RGB(r, g, b) \
nuclear@6 86 ((((uint16_t)(r) << 1) & 0xe) | \
nuclear@6 87 (((uint16_t)(g) << 5) & 0xe0) | \
nuclear@6 88 (((uint16_t)(b) << 9) & 0xe00))
nuclear@6 89
nuclear@5 90 #define VDP_RGB24(r, g, b) \
nuclear@5 91 ((((uint16_t)(r) >> 4) & 0xe) | \
nuclear@5 92 ((uint16_t)(g) & 0xe0) | \
nuclear@5 93 (((uint16_t)(b) << 4) & 0xe00))
nuclear@5 94
nuclear@6 95 #define VDP_SET_CRAM_RGB(r, g, b) \
nuclear@6 96 do { VDP_PORT_DATA = VDP_RGB(r, g, b); } while(0)
nuclear@6 97
nuclear@5 98 #define VDP_SET_CRAM_RGB24(r, g, b) \
nuclear@5 99 do { VDP_PORT_DATA = VDP_RGB24(r, g, b); } while(0)
nuclear@5 100
nuclear@5 101 #define VDP_SET_BGCOLOR(pal, col) \
nuclear@6 102 do { VDP_SET_REG(VDP_REG_BGCOLOR, ((pal) << 4) | (col)); } while(0)
nuclear@6 103
nuclear@6 104 /* arguments to vdp_tilemap_slot */
nuclear@6 105 #define VDP_PLANE_A 0
nuclear@6 106 #define VDP_PLANE_WIN 1
nuclear@6 107 #define VDP_PLANE_B 2
nuclear@6 108
nuclear@6 109 int vdp_init(void);
nuclear@6 110 void vdp_set_tilemap_slot(int plane, int slot);
nuclear@6 111 void *vdp_tilemap_ptr(int plane);
nuclear@6 112 void vdp_setpal_rgb24(int idx, int r, int g, int b);
nuclear@6 113 void vdp_setpal(int idx0, int count, unsigned char *pal);
nuclear@6 114 /* TODO vdp_setpal_dma */
nuclear@6 115
nuclear@6 116 /* xtiles and ytiles can only be 32, 64, or 128 */
nuclear@6 117 void vdp_set_scroll_size(int xtiles, int ytiles);
nuclear@4 118
nuclear@4 119 #endif /* VDP_H_ */