rev |
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nuclear@0
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1 ; vi:ft=rgbasm:
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nuclear@0
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2 include "hw.inc"
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3
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4 xoffs_center equ 4
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5 yoffs_center equ 12
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6
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7 frame equ $ff80
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8 bnstate equ $ff81
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9 bnxor equ $ff82
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10 pause equ $ff83
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11
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12 BN_A equ $01
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13 BN_B equ $02
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14 BN_SELECT equ $04
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15 BN_START equ $08
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16 BN_RIGHT equ $10
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17 BN_LEFT equ $20
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18 BN_UP equ $40
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19 BN_DOWN equ $80
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20
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nuclear@0
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21 section "hdr", ROM0[$100]
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22 nop
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23 jp main
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24
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25 rept $150 - $104
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26 db 0
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27 endr
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28
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29 section "text", ROM0
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30
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31 main:
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32 call init
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33
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34 xor a, a
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35 ldh [frame], a
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36 ldh [bnstate], a
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37 ldh [bnxor], a
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38 ldh [pause], a
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39
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40 .mainloop:
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41 ldh a, [REG_LY]
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42 cp a, 144
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43 jr c, .wait_hsync
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44
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nuclear@3
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45 ; we're in vsync, increment frame counter, handle input,
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46 ; and wait for the next frame
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47 call read_input
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48
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49 ; swap palette if A is pressed
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50 ldh a, [bnxor]
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51 and a, BN_A
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52 jr z, .skip_akey ; skip if A haven't changed state since last frame
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53 ldh a, [bnstate]
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54 and a, BN_A
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55 jr z, .skip_akey ; skip if A is not pressed
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56 ldh a, [REG_BGP]
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57 cpl
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58 ldh [REG_BGP], a
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59 .skip_akey:
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60 ; toggle pause if start is pressed
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61 ldh a, [bnxor]
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62 and a, BN_START
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63 jr z, .skip_startkey ; skip if start haven't changed state since last frame
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64 ldh a, [bnstate]
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65 and a, BN_START
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66 jr z, .skip_startkey ; skip if start is not pressed
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67 ldh a, [pause]
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68 cpl
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69 ldh [pause], a
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70 .skip_startkey:
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71
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72 ; increment frame if we're not paused
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73 ldh a, [pause]
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74 bit 0, a
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75 jr nz, .skip_frameinc
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76 ldh a, [frame]
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77 inc a
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78 ldh [frame], a
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79 .skip_frameinc:
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80
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81
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82 .wait_newframe:
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83 ldh a, [REG_LY]
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84 cp a, 0
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85 jr nz, .wait_newframe
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86
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87 ; scanline code
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88 .wait_hsync:
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89 ldh a, [REG_STAT]
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90 and a, STAT_MODE_MASK
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91 jr nz, .wait_hsync
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92
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93 ldh a, [frame]
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94 ld d, a
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95
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96 xor a, a
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97 ld b, a
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98
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99 ldh a, [REG_LY]
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100 add a, d ; add frame number
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101 ld c, a
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102
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103 ld hl, sintab
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104 add hl, bc ; hl now points to the sine value
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105
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106 ld a, [hl]
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107
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108 ; add a half-octave sine
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109 ld e, a ; save first sine to e
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110 sla d
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111 ld a, [REG_LY]
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112 sla a
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113 add a, d
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114 ld c, a
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115 srl d
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116
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117 ld hl, sintab
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118 add hl, bc
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119 ld a, [hl]
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120 sra a
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121 add a, e ; add previously saved sine
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122
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123 add a, yoffs_center
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124 ldh [REG_SCY], a
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125
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126 ; do something for SCX too
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127 ld a, d
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128 sla a
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129 ld d, a
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130
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131 ldh a, [REG_LY]
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132 add a, 32
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133 add a, d ; add frame number
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134 ld c, a
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135
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136 ld hl, sintab
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137 add hl, bc
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138
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139 ld a, [hl]
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140 sra a
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141 add a, xoffs_center
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142 ldh [REG_SCX], a
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143
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144 ; done, wait until we're out of hsync
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145 .wait_endhsync:
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146 ldh a, [REG_STAT]
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147 and a, STAT_MODE_MASK
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148 jr z, .wait_endhsync
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149
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150 jp .mainloop
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151
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152
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153 di
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154 .end: halt
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155 nop
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156 jp .end
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157
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158 init:
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159 call wait_vsync
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160 xor a, a
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161 ldh [REG_LCDC], a
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162
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163 ; setup palette
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164 ld a, $1b
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165 ldh [REG_BGP], a
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166
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167 ; copy tiles
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168 ld hl, $8000
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169 ld de, tiles
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170 ld bc, tiles_end - tiles
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171 .copytiles:
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172 ld a, [de]
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173 ld [hl+], a
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174 inc de
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175 dec bc
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176 ld a, b
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177 or c
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178 jp nz, .copytiles
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179
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180 ; copy tilemap
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181 ld hl, $9800
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182 ld de, tilemap
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183 ld b, 21
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184 .copymap:
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185 ld c, 21
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186 .copymaprow:
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187 ld a, [de]
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188 inc de
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189 ld [hl+], a
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190 dec c
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191 jr nz, .copymaprow
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192
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193 push bc
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194 ld bc, 11
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195 add hl, bc
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196 pop bc
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197
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198 dec b
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199 jr nz, .copymap
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200
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201 ; center viewport
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202 ld a, yoffs_center
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203 ldh [REG_SCY], a
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204 ld a, xoffs_center
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205 ldh [REG_SCX], a
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206
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207 ; configure LCD
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208 ld a, LCDC_DISPON | LCDC_CHAR_8000 | LCDC_BGON
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209 ldh [REG_LCDC], a
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210 ret
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211
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212 wait_vsync:
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213 ldh a, [REG_LY]
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214 cp a, 144
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215 jr c, wait_vsync
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216 ret
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217
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218 read_input:
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219 ; read D-pad
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220 ld a, P1_DPAD
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221 ld [REG_P1], a
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222 ld a, [REG_P1]
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223 ld a, [REG_P1]
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224 cpl
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225 and a, $0f
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226 swap a
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227 ld b, a
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228 ; read buttons
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229 ld a, P1_BUTTONS
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230 ld [REG_P1], a
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231 ld a, [REG_P1]
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232 ld a, [REG_P1]
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233 ld a, [REG_P1]
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234 ld a, [REG_P1]
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235 ld a, [REG_P1]
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236 ld a, [REG_P1]
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237 cpl
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238 and a, $0f
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239 or a, b
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240 ld b, a
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241 ; reset port
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242 ld a, P1_DPAD | P1_BUTTONS
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243 ldh [REG_P1], a
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244 ; calculate differences and save state variables
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245 ldh a, [bnstate]
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246 xor a, b
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247 ldh [bnxor], a
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248 ld a, b
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249 ldh [bnstate], a
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250 ret
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251
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252 section "data", ROM0, align[8]
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253 sintab:
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254 include "sin.inc"
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255
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256 tiles:
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257 incbin "logo.tiles"
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258 tiles_end:
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259 tilemap:
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260 incbin "logo.tilemap"
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261 tilemap_end:
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