gb_test2

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optionally use the generated chessboard instead of the logo to fit in my 2k test ROM
author John Tsiombikas <nuclear@member.fsf.org>
date Thu, 10 Jan 2019 06:38:13 +0200
parents d7c6e1165028
children be6f719279b6
line source
1 ; vi:ft=rgbasm:
2 ; -------- build options ----------
3 BUILD_CHESS equ 1
4 BUILD_LOGO equ 2
5
6 BUILD = BUILD_LOGO
7 ; ---------------------------------
8
9 include "hw.inc"
10
11 xoffs_center equ 4
12 yoffs_center equ 12
13
14 frame equ $ff80
15 bnstate equ $ff81
16 bnxor equ $ff82
17 pause equ $ff83
18
19 BN_A equ $01
20 BN_B equ $02
21 BN_SELECT equ $04
22 BN_START equ $08
23 BN_RIGHT equ $10
24 BN_LEFT equ $20
25 BN_UP equ $40
26 BN_DOWN equ $80
27
28 section "hdr", ROM0[$100]
29 nop
30 jp main
31
32 rept $150 - $104
33 db 0
34 endr
35
36 section "text", ROM0
37
38 main:
39 call init
40
41 xor a, a
42 ldh [frame], a
43 ldh [bnstate], a
44 ldh [bnxor], a
45 ldh [pause], a
46
47 .mainloop:
48 ldh a, [REG_LY]
49 cp a, 144
50 jr c, .wait_hsync
51
52 ; we're in vsync, increment frame counter, handle input,
53 ; and wait for the next frame
54 call read_input
55
56 ; swap palette if A is pressed
57 ldh a, [bnxor]
58 and a, BN_A
59 jr z, .skip_akey ; skip if A haven't changed state since last frame
60 ldh a, [bnstate]
61 and a, BN_A
62 jr z, .skip_akey ; skip if A is not pressed
63 ldh a, [REG_BGP]
64 cpl
65 ldh [REG_BGP], a
66 .skip_akey:
67 ; toggle pause if start is pressed
68 ldh a, [bnxor]
69 and a, BN_START
70 jr z, .skip_startkey ; skip if start haven't changed state since last frame
71 ldh a, [bnstate]
72 and a, BN_START
73 jr z, .skip_startkey ; skip if start is not pressed
74 ldh a, [pause]
75 cpl
76 ldh [pause], a
77 .skip_startkey:
78
79 ; increment frame if we're not paused
80 ldh a, [pause]
81 bit 0, a
82 jr nz, .skip_frameinc
83 ldh a, [frame]
84 inc a
85 ldh [frame], a
86 .skip_frameinc:
87
88
89 .wait_newframe:
90 ldh a, [REG_LY]
91 cp a, 0
92 jr nz, .wait_newframe
93
94 ; scanline code
95 .wait_hsync:
96 ldh a, [REG_STAT]
97 and a, STAT_MODE_MASK
98 jr nz, .wait_hsync
99
100 ldh a, [frame]
101 ld d, a
102
103 xor a, a
104 ld b, a
105
106 ldh a, [REG_LY]
107 add a, d ; add frame number
108 ld c, a
109
110 ld hl, sintab
111 add hl, bc ; hl now points to the sine value
112
113 ld a, [hl]
114
115 ; add a half-octave sine
116 ld e, a ; save first sine to e
117 sla d
118 ld a, [REG_LY]
119 sla a
120 add a, d
121 ld c, a
122 srl d
123
124 ld hl, sintab
125 add hl, bc
126 ld a, [hl]
127 sra a
128 add a, e ; add previously saved sine
129
130 add a, yoffs_center
131 ldh [REG_SCY], a
132
133 ; do something for SCX too
134 ld a, d
135 sla a
136 ld d, a
137
138 ldh a, [REG_LY]
139 add a, 32
140 add a, d ; add frame number
141 ld c, a
142
143 ld hl, sintab
144 add hl, bc
145
146 ld a, [hl]
147 sra a
148 add a, xoffs_center
149 ldh [REG_SCX], a
150
151 ; done, wait until we're out of hsync
152 .wait_endhsync:
153 ldh a, [REG_STAT]
154 and a, STAT_MODE_MASK
155 jr z, .wait_endhsync
156
157 jp .mainloop
158
159
160 di
161 .end: halt
162 nop
163 jp .end
164
165 init:
166 call wait_vsync
167 xor a, a
168 ldh [REG_LCDC], a
169
170 ; setup palette
171 ld a, $1b
172 ldh [REG_BGP], a
173
174 ; copy tiles
175 ld hl, $8000
176 ld de, tiles
177 ld bc, tiles_end - tiles
178 .copytiles:
179 ld a, [de]
180 ld [hl+], a
181 inc de
182 dec bc
183 ld a, b
184 or c
185 jp nz, .copytiles
186
187 IF BUILD == BUILD_LOGO
188 ; copy logo tilemap
189 ld hl, $9800
190 ld de, tilemap
191 ld b, 21
192 .copymap:
193 ld c, 21
194 .copymaprow:
195 ld a, [de]
196 inc de
197 ld [hl+], a
198 dec c
199 jr nz, .copymaprow
200
201 push bc
202 ld bc, 11
203 add hl, bc
204 pop bc
205
206 dec b
207 jr nz, .copymap
208 ELSE
209 ; generate chessboard tilemap
210 ld hl, $9800
211 ld b, 32
212 .fillscr:
213 ld c, 32
214 .fillrow:
215 ld a, b
216 add a, c
217 and a, 1
218
219 ld [hl+], a
220 dec c
221 jr nz, .fillrow
222
223 dec b
224 jr nz, .fillscr
225 ENDC
226
227 ; center viewport
228 ld a, yoffs_center
229 ldh [REG_SCY], a
230 ld a, xoffs_center
231 ldh [REG_SCX], a
232
233 ; configure LCD
234 ld a, LCDC_DISPON | LCDC_CHAR_8000 | LCDC_BGON
235 ldh [REG_LCDC], a
236 ret
237
238 wait_vsync:
239 ldh a, [REG_LY]
240 cp a, 144
241 jr c, wait_vsync
242 ret
243
244 read_input:
245 ; read D-pad
246 ld a, P1_DPAD
247 ld [REG_P1], a
248 ld a, [REG_P1]
249 ld a, [REG_P1]
250 cpl
251 and a, $0f
252 swap a
253 ld b, a
254 ; read buttons
255 ld a, P1_BUTTONS
256 ld [REG_P1], a
257 ld a, [REG_P1]
258 ld a, [REG_P1]
259 ld a, [REG_P1]
260 ld a, [REG_P1]
261 ld a, [REG_P1]
262 ld a, [REG_P1]
263 cpl
264 and a, $0f
265 or a, b
266 ld b, a
267 ; reset port
268 ld a, P1_DPAD | P1_BUTTONS
269 ldh [REG_P1], a
270 ; calculate differences and save state variables
271 ldh a, [bnstate]
272 xor a, b
273 ldh [bnxor], a
274 ld a, b
275 ldh [bnstate], a
276 ret
277
278 section "data", ROM0, align[8]
279 sintab:
280 include "sin.inc"
281
282 IF BUILD == BUILD_LOGO
283 tiles:
284 incbin "logo.tiles"
285 tiles_end:
286 tilemap:
287 incbin "logo.tilemap"
288 tilemap_end:
289
290 ELSE
291 ; chessboard tiles
292 tiles:
293 db $55,$00
294 db $aa,$00
295 db $55,$00
296 db $aa,$00
297 db $55,$00
298 db $aa,$00
299 db $55,$00
300 db $aa,$00
301
302 db $ff,$aa
303 db $ff,$55
304 db $ff,$aa
305 db $ff,$55
306 db $ff,$aa
307 db $ff,$55
308 db $ff,$aa
309 db $ff,$55
310 tiles_end:
311 ENDC