megadrive_test1
view src/vdp.c @ 7:8253942b0a1a
in the middle of something
| author | John Tsiombikas <nuclear@member.fsf.org> |
|---|---|
| date | Sun, 19 Feb 2017 14:00:26 +0200 |
| parents | 862f8a034cae |
| children |
line source
1 #include <stdint.h>
2 #include "vdp.h"
3 #include "io.h"
4 #include "misc.h"
6 unsigned char vdp_shadow_reg[24];
8 static uint32_t tilemap_addr[3];
10 int vdp_init(void)
11 {
12 unsigned int mode1_flags = VDP_MSET2_DISP_BIT;
14 if(mdg_ispal()) {
15 mode1_flags |= VDP_MSET2_30CELL_BIT;
16 }
18 VDP_SET_REG(VDP_REG_MSET1, VDP_MSET1_BASE);
19 VDP_SET_REG(VDP_REG_MSET2, VDP_MSET2_BASE | mode1_flags);
21 return 0;
22 }
24 void vdp_set_tilemap_slot(int plane, int slot)
25 {
26 switch(plane) {
27 case VDP_PLANE_A:
28 VDP_SET_REG(VDP_REG_PADDR_A, (slot & 7) << 3);
29 tilemap_addr[VDP_PLANE_A] = ((uint32_t)slot << 13);
30 break;
32 case VDP_PLANE_WIN:
33 VDP_SET_REG(VDP_REG_PADDR_WIN, (slot & 0x1f) << 1);
34 tilemap_addr[VDP_PLANE_WIN] = ((uint32_t)slot << 11);
35 break;
37 case VDP_PLANE_B:
38 VDP_SET_REG(VDP_REG_PADDR_B, slot & 7);
39 tilemap_addr[VDP_PLANE_B] = ((uint32_t)slot << 13);
40 break;
41 }
42 }
44 uint32_t vdp_tilemap_addr(int plane)
45 {
46 return tilemap_addr[plane];
47 }
49 void vdp_setpal_rgb24(int idx, int r, int g, int b)
50 {
51 VDP_SET_CRAM_ADDR(idx);
52 VDP_SET_CRAM_RGB24(r, g, b);
53 }
55 void vdp_setpal(int idx0, int count, unsigned char *pal)
56 {
57 int i;
59 VDP_SET_CRAM_ADDR(idx0);
60 for(i=0; i<count; i++) {
61 VDP_SET_CRAM_RGB24(pal[0], pal[1], pal[2]);
62 pal += 3;
63 }
64 }
66 #define SCROLLSIZE(x) \
67 do { \
68 switch(xtiles) { \
69 case 32: \
70 case 64: \
71 (x) >>= 6; \
72 break; \
73 case 128: \
74 (x) = 3; \
75 break; \
76 default: \
77 panic("invalid argument to %s: %d\n", (x), __func__); \
78 } \
79 } while(0)
81 void vdp_set_scroll_size(int xtiles, int ytiles)
82 {
83 SCROLLSIZE(xtiles);
84 SCROLLSIZE(ytiles);
86 VDP_SET_REG(VDP_REG_SCROLL_SIZE, (ytiles << 4) | xtiles);
87 }
89 void vdp_memcpy(uint32_t vaddr, void *src, int sz)
90 {
91 uint32_t saddr = (uint32_t)src;
92 sz >>= 1; /* we'll transfer words */
93 VDP_SET_REG_NOSHADOW(VDP_REG_MSET2,
94 vdp_shadow_reg[VDP_REG_MSET2] | VDP_MSET2_DMA_BIT);
95 VDP_SET_REG(VDP_REG_AUTOINC, 2);
96 VDP_SET_REG(VDP_REG_DMALEN_LOW, sz);
97 VDP_SET_REG(VDP_REG_DMALEN_HIGH, sz >> 8);
98 VDP_SET_REG(VDP_REG_DMA_SADDR_LOW, saddr >> 1);
99 VDP_SET_REG(VDP_REG_DMA_SADDR_MID, saddr >> 9);
100 VDP_SET_REG(VDP_REG_DMA_SADDR_HIGH, saddr >> 17);
102 VDP_PORT_CTL = (vaddr & 0x3ffe) |
103 }