1.1 --- a/Makefile	Thu Mar 09 08:45:11 2017 +0200
     1.2 +++ b/Makefile	Sun Jun 04 02:56:55 2017 +0300
     1.3 @@ -1,6 +1,6 @@
     1.4  src = $(wildcard *.c)
     1.5  obj = $(src:.c=.o)
     1.6 -bin = test_simm72_dram
     1.7 +bin = test_simm30_dram
     1.8  hex = $(bin).hex
     1.9  eep = $(bin).eep
    1.10  

     2.1 --- a/test.c	Thu Mar 09 08:45:11 2017 +0200
     2.2 +++ b/test.c	Sun Jun 04 02:56:55 2017 +0300
     2.3 @@ -1,5 +1,5 @@
     2.4  /*
     2.5 -72pin SIMM DRAM tester.
     2.6 +30pin SIMM DRAM tester.
     2.7  Copyright (C) 2017  John Tsiombikas <nuclear@member.fsf.org>
     2.8  
     2.9  This program is free software: you can redistribute it and/or modify
    2.10 @@ -31,14 +31,12 @@
    2.11   * A[0,7]	data
    2.12   * B[0,7]	A0 - A7
    2.13   * C[0,3]	A8 - A11
    2.14 - * D7		CAS3
    2.15 - * D6		RAS2
    2.16 - * D5		RAS3
    2.17 + * D7		CAS
    2.18 + * D6		RAS
    2.19   */
    2.20  
    2.21 -#define CAS3_BIT	0x80
    2.22 -#define RAS2_BIT	0x40
    2.23 -#define RAS3_BIT	0x20
    2.24 +#define CAS_BIT	0x80
    2.25 +#define RAS_BIT	0x40
    2.26  #define WE_BIT		0x04
    2.27  
    2.28  void proc_cmd(char *cmd);
    2.29 @@ -62,7 +60,6 @@
    2.30  /* SIMM access config */
    2.31  static int addr_bits;
    2.32  static uint32_t addr_mask;
    2.33 -static int ras_lines = 1;
    2.34  static long memsize_kb;	/* derived from the above */
    2.35  
    2.36  int main(void)
    2.37 @@ -205,13 +202,6 @@
    2.38  		} else {
    2.39  			fprintf(stderr, "invalid address bits value: %ld\n", value);
    2.40  		}
    2.41 -	} else if(strcmp(name, "ras_lines") == 0) {
    2.42 -		if(value > 0 && value <= 2) {
    2.43 -			ras_lines = value;
    2.44 -			printf("RAS lines: %d\n", ras_lines);
    2.45 -		} else {
    2.46 -			fprintf(stderr, "invalid RAS lines value: %ld\n", value);
    2.47 -		}
    2.48  	} else {
    2.49  		fprintf(stderr, "unknown variable: %s\n", name);
    2.50  	}
    2.51 @@ -239,10 +229,9 @@
    2.52  	printf("Detecting memory ...\n");
    2.53  	dram_detect();
    2.54  
    2.55 -	memsize_kb = ((uint32_t)1 << (addr_bits * 2)) * 4 * ras_lines;
    2.56 +	memsize_kb = ((uint32_t)1 << addr_bits);
    2.57  
    2.58  	printf("Address lines: %d\n", addr_bits);
    2.59 -	printf("RAS lines: %d\n", ras_lines);
    2.60  	printf("Memory size: %ldmb (%ldkb)\n", memsize_kb >> 20, memsize_kb >> 10);
    2.61  }
    2.62  
    2.63 @@ -267,22 +256,22 @@
    2.64  
    2.65  void dram_assert_cas(void)
    2.66  {
    2.67 -	PORTD &= ~CAS3_BIT;
    2.68 +	PORTD &= ~CAS_BIT;
    2.69  }
    2.70  
    2.71  void dram_release_cas(void)
    2.72  {
    2.73 -	PORTD |= CAS3_BIT;
    2.74 +	PORTD |= CAS_BIT;
    2.75  }
    2.76  
    2.77 -void dram_assert_ras(unsigned char bits)
    2.78 +void dram_assert_ras(void)
    2.79  {
    2.80 -	PORTD &= ~bits;
    2.81 +	PORTD &= ~RAS_BIT;
    2.82  }
    2.83  
    2.84 -void dram_release_ras(unsigned char bits)
    2.85 +void dram_release_ras(void)
    2.86  {
    2.87 -	PORTD |= bits;
    2.88 +	PORTD |= RAS_BIT;
    2.89  }
    2.90  
    2.91  void dram_set_we(void)
    2.92 @@ -327,13 +316,6 @@
    2.93  		fprintf(stderr, "Failed to detect DRAM configuration (address lines)...\n");
    2.94  		return;
    2.95  	}
    2.96 -
    2.97 -	/* now detect if there's a second ras pair */
    2.98 -	++addr;	/* addr was already the highest of the first bank, see if there's a second */
    2.99 -	ras_lines = 2;
   2.100 -	if(memtest(addr) != 0) {
   2.101 -		ras_lines = 1;
   2.102 -	}
   2.103  }
   2.104  
   2.105  int memtest(uint32_t addr)
   2.106 @@ -342,7 +324,7 @@
   2.107  	unsigned char pat[] = { 0xf0, 0x0f, 0xaa, 0x55, 0xc0, 0x30, 0x0c, 0x03 };
   2.108  	unsigned char val;
   2.109  
   2.110 -	printf("testing address: %lx (a:%d,r:%d)\n", (unsigned long)addr, addr_bits, ras_lines);
   2.111 +	printf("testing address: %lx (a:%d)\n", (unsigned long)addr, addr_bits);
   2.112  
   2.113  	for(i=0; i<sizeof pat / sizeof *pat; i++) {
   2.114  		dram_write(addr, pat[i]);
   2.115 @@ -357,26 +339,25 @@
   2.116  void dram_refresh(void)
   2.117  {
   2.118  	dram_assert_cas();
   2.119 -	dram_assert_ras(RAS2_BIT | RAS3_BIT);
   2.120 +	dram_assert_ras();
   2.121  	dram_release_cas();
   2.122 -	dram_release_ras(RAS2_BIT | RAS3_BIT);
   2.123 +	dram_release_ras();
   2.124  }
   2.125  
   2.126  void dram_write(uint32_t addr, unsigned char val)
   2.127  {
   2.128  	uint32_t row_addr = (addr >> addr_bits) & addr_mask;
   2.129  	uint32_t col_addr = addr & addr_mask;
   2.130 -	unsigned char ras = (addr >> (addr_bits * 2)) ? RAS3_BIT : RAS2_BIT;
   2.131  
   2.132  	dram_set_data(val);
   2.133  	dram_set_we();
   2.134  	/* set row address */
   2.135  	dram_set_addr(row_addr);
   2.136 -	dram_assert_ras(ras);
   2.137 +	dram_assert_ras();
   2.138  	/* set column address */
   2.139  	dram_set_addr(col_addr);
   2.140  	dram_assert_cas();
   2.141 -	dram_release_ras(ras);
   2.142 +	dram_release_ras();
   2.143  	dram_release_cas();
   2.144  	dram_release_data();
   2.145  	dram_clear_we();
   2.146 @@ -387,7 +368,6 @@
   2.147  	unsigned char val;
   2.148  	uint32_t row_addr = (addr >> addr_bits) & addr_mask;
   2.149  	uint32_t col_addr = addr & addr_mask;
   2.150 -	unsigned char ras = (addr >> (addr_bits * 2)) ? RAS3_BIT : RAS2_BIT;
   2.151  
   2.152  	dram_clear_we();
   2.153  	/* this is necessary to remove previous data from the lines when no-one is driving them
   2.154 @@ -398,14 +378,14 @@
   2.155  
   2.156  	/* set row address */
   2.157  	dram_set_addr(row_addr);
   2.158 -	dram_assert_ras(ras);
   2.159 +	dram_assert_ras();
   2.160  	/* set column address */
   2.161  	dram_set_addr(col_addr);
   2.162  	dram_assert_cas();
   2.163  
   2.164  	val = PINA;
   2.165  
   2.166 -	dram_release_ras(ras);
   2.167 +	dram_release_ras();
   2.168  	dram_release_cas();
   2.169  
   2.170  	return val;