# HG changeset patch # User John Tsiombikas # Date 1496534215 -10800 # Node ID 7d9b129a5791a0aeb2946fb054cd47a3ba5cf849 # Parent 1f8683589ee85c17fff63ea6b383bdeb5fd64d75 convert to 30pin diff -r 1f8683589ee8 -r 7d9b129a5791 Makefile --- a/Makefile Thu Mar 09 08:45:11 2017 +0200 +++ b/Makefile Sun Jun 04 02:56:55 2017 +0300 @@ -1,6 +1,6 @@ src = $(wildcard *.c) obj = $(src:.c=.o) -bin = test_simm72_dram +bin = test_simm30_dram hex = $(bin).hex eep = $(bin).eep diff -r 1f8683589ee8 -r 7d9b129a5791 test.c --- a/test.c Thu Mar 09 08:45:11 2017 +0200 +++ b/test.c Sun Jun 04 02:56:55 2017 +0300 @@ -1,5 +1,5 @@ /* -72pin SIMM DRAM tester. +30pin SIMM DRAM tester. Copyright (C) 2017 John Tsiombikas This program is free software: you can redistribute it and/or modify @@ -31,14 +31,12 @@ * A[0,7] data * B[0,7] A0 - A7 * C[0,3] A8 - A11 - * D7 CAS3 - * D6 RAS2 - * D5 RAS3 + * D7 CAS + * D6 RAS */ -#define CAS3_BIT 0x80 -#define RAS2_BIT 0x40 -#define RAS3_BIT 0x20 +#define CAS_BIT 0x80 +#define RAS_BIT 0x40 #define WE_BIT 0x04 void proc_cmd(char *cmd); @@ -62,7 +60,6 @@ /* SIMM access config */ static int addr_bits; static uint32_t addr_mask; -static int ras_lines = 1; static long memsize_kb; /* derived from the above */ int main(void) @@ -205,13 +202,6 @@ } else { fprintf(stderr, "invalid address bits value: %ld\n", value); } - } else if(strcmp(name, "ras_lines") == 0) { - if(value > 0 && value <= 2) { - ras_lines = value; - printf("RAS lines: %d\n", ras_lines); - } else { - fprintf(stderr, "invalid RAS lines value: %ld\n", value); - } } else { fprintf(stderr, "unknown variable: %s\n", name); } @@ -239,10 +229,9 @@ printf("Detecting memory ...\n"); dram_detect(); - memsize_kb = ((uint32_t)1 << (addr_bits * 2)) * 4 * ras_lines; + memsize_kb = ((uint32_t)1 << addr_bits); printf("Address lines: %d\n", addr_bits); - printf("RAS lines: %d\n", ras_lines); printf("Memory size: %ldmb (%ldkb)\n", memsize_kb >> 20, memsize_kb >> 10); } @@ -267,22 +256,22 @@ void dram_assert_cas(void) { - PORTD &= ~CAS3_BIT; + PORTD &= ~CAS_BIT; } void dram_release_cas(void) { - PORTD |= CAS3_BIT; + PORTD |= CAS_BIT; } -void dram_assert_ras(unsigned char bits) +void dram_assert_ras(void) { - PORTD &= ~bits; + PORTD &= ~RAS_BIT; } -void dram_release_ras(unsigned char bits) +void dram_release_ras(void) { - PORTD |= bits; + PORTD |= RAS_BIT; } void dram_set_we(void) @@ -327,13 +316,6 @@ fprintf(stderr, "Failed to detect DRAM configuration (address lines)...\n"); return; } - - /* now detect if there's a second ras pair */ - ++addr; /* addr was already the highest of the first bank, see if there's a second */ - ras_lines = 2; - if(memtest(addr) != 0) { - ras_lines = 1; - } } int memtest(uint32_t addr) @@ -342,7 +324,7 @@ unsigned char pat[] = { 0xf0, 0x0f, 0xaa, 0x55, 0xc0, 0x30, 0x0c, 0x03 }; unsigned char val; - printf("testing address: %lx (a:%d,r:%d)\n", (unsigned long)addr, addr_bits, ras_lines); + printf("testing address: %lx (a:%d)\n", (unsigned long)addr, addr_bits); for(i=0; i> addr_bits) & addr_mask; uint32_t col_addr = addr & addr_mask; - unsigned char ras = (addr >> (addr_bits * 2)) ? RAS3_BIT : RAS2_BIT; dram_set_data(val); dram_set_we(); /* set row address */ dram_set_addr(row_addr); - dram_assert_ras(ras); + dram_assert_ras(); /* set column address */ dram_set_addr(col_addr); dram_assert_cas(); - dram_release_ras(ras); + dram_release_ras(); dram_release_cas(); dram_release_data(); dram_clear_we(); @@ -387,7 +368,6 @@ unsigned char val; uint32_t row_addr = (addr >> addr_bits) & addr_mask; uint32_t col_addr = addr & addr_mask; - unsigned char ras = (addr >> (addr_bits * 2)) ? RAS3_BIT : RAS2_BIT; dram_clear_we(); /* this is necessary to remove previous data from the lines when no-one is driving them @@ -398,14 +378,14 @@ /* set row address */ dram_set_addr(row_addr); - dram_assert_ras(ras); + dram_assert_ras(); /* set column address */ dram_set_addr(col_addr); dram_assert_cas(); val = PINA; - dram_release_ras(ras); + dram_release_ras(); dram_release_cas(); return val;