nds_test2

diff src/startup/arm7entry.s @ 0:abcaf667f2bd

initial commit (3d + 2d)
author John Tsiombikas <nuclear@member.fsf.org>
date Sun, 28 Jan 2018 20:05:26 +0200
parents
children
line diff
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/src/startup/arm7entry.s	Sun Jan 28 20:05:26 2018 +0200
     1.3 @@ -0,0 +1,175 @@
     1.4 +@ vi:set filetype=armasm:
     1.5 +	.section ".crt0","ax"
     1.6 +	.global _start
     1.7 +	.align	4
     1.8 +	.arm
     1.9 +_start:
    1.10 +	mov	r0, #0x04000000		@ IME = 0;
    1.11 +	mov	r1, #0
    1.12 +	str	r1, [r0, #0x208]
    1.13 +
    1.14 +	mov	r0, #0x12		@ Switch to IRQ Mode
    1.15 +	msr	cpsr, r0
    1.16 +	ldr	sp, =__sp_irq		@ Set IRQ stack
    1.17 +
    1.18 +	mov	r0, #0x13		@ Switch to SVC Mode
    1.19 +	msr	cpsr, r0
    1.20 +	ldr	sp, =__sp_svc		@ Set SVC stack
    1.21 +
    1.22 +	mov	r0, #0x1F		@ Switch to System Mode
    1.23 +	msr	cpsr, r0
    1.24 +	ldr	sp, =__sp_usr		@ Set user stack
    1.25 +
    1.26 +#ifndef VRAM
    1.27 +	adr	r1, __sync_start	@ Perform ARM7<->ARM9 sync code
    1.28 +	ldr	r2, =__arm7_start__
    1.29 +	mov	r3, #(__sync_end-__sync_start)
    1.30 +	mov	r8, r2
    1.31 +	bl	CopyMem
    1.32 +	mov	r3, r8
    1.33 +	bl	_blx_r3_stub
    1.34 +
    1.35 +@ Copy arm7 binary from LMA to VMA (EWRAM to IWRAM)
    1.36 +	adr	r0, arm7lma		@ Calculate ARM7 LMA
    1.37 +	ldr	r1, [r0]
    1.38 +	add	r1, r1, r0
    1.39 +	ldr	r2, =__arm7_start__
    1.40 +	ldr	r4, =__arm7_end__
    1.41 +	bl	CopyMemCheck
    1.42 +
    1.43 +#else
    1.44 +	bl	__sync_start
    1.45 +#endif
    1.46 +
    1.47 +	ldr	r0, =__bss_start__	@ Clear BSS section to 0x00
    1.48 +	ldr	r1, =__bss_end__
    1.49 +	sub	r1, r1, r0
    1.50 +	bl	ClearMem
    1.51 +
    1.52 +#ifndef VRAM
    1.53 +	cmp	r10, #1
    1.54 +	bne	NotTWL
    1.55 +	ldr	r1, =__dsimode		@ set DSi mode flag
    1.56 +	strb	r10, [r1]
    1.57 +
    1.58 +	ldr	r1, =0x02ffe1d8		@ Get ARM7i LMA from header
    1.59 +	ldr	r1, [r1]
    1.60 +	ldr	r2, =__arm7i_start__
    1.61 +	ldr	r4, =__arm7i_end__
    1.62 +	bl	CopyMemCheck
    1.63 +
    1.64 +	ldr	r0, =__twl_bss_start__	@ Clear TWL BSS section to 0x00
    1.65 +	ldr	r1, =__twl_bss_end__
    1.66 +	sub	r1, r1, r0
    1.67 +	bl	ClearMem
    1.68 +#endif
    1.69 +
    1.70 +NotTWL:
    1.71 +	mov	r0, #0			@ int argc
    1.72 +	mov	r1, #0			@ char *argv[]
    1.73 +	ldr	r3, =main
    1.74 +	mov	r12, #0x4000000		@ tell arm9 we are ready
    1.75 +	mov	r9, #0
    1.76 +	str	r9, [r12, #0x180]
    1.77 +_blx_r3_stub:
    1.78 +	bx	r3
    1.79 +infloop:
    1.80 +	b infloop
    1.81 +
    1.82 +#ifndef VRAM
    1.83 +arm7lma:
    1.84 +	.word	__arm7_lma__ - .
    1.85 +#endif
    1.86 +	.pool
    1.87 +
    1.88 +@---------------------------------------------------------------------------------
    1.89 +@ ARM7<->ARM9 synchronization code
    1.90 +@---------------------------------------------------------------------------------
    1.91 +
    1.92 +__sync_start:
    1.93 +	push	{lr}
    1.94 +	mov	r12, #0x4000000
    1.95 +	mov	r9, #0x0
    1.96 +	bl	IPCSync
    1.97 +	mov	r9, #(0x9<<8)
    1.98 +	str	r9, [r12, #0x180]
    1.99 +	mov	r9, #0xA
   1.100 +	bl	IPCSync
   1.101 +	mov	r9, #(0xB<<8)
   1.102 +	str	r9, [r12, #0x180]
   1.103 +	mov	r9, #0xC
   1.104 +	bl	IPCSync
   1.105 +	mov	r9, #(0xD<<8)
   1.106 +	str	r9, [r12, #0x180]
   1.107 +IPCRecvFlag:
   1.108 +	ldr	r10, [r12, #0x180]
   1.109 +	and	r10, r10, #0xF
   1.110 +	cmp	r10, #0xC
   1.111 +	beq	IPCRecvFlag
   1.112 +	pop	{pc}
   1.113 +IPCSync:
   1.114 +	ldr	r10, [r12, #0x180]
   1.115 +	and	r10, r10, #0xF
   1.116 +	cmp	r10, r9
   1.117 +	bne	IPCSync
   1.118 +	bx	lr
   1.119 +__sync_end:
   1.120 +
   1.121 +@---------------------------------------------------------------------------------
   1.122 +@ Clear memory to 0x00 if length != 0
   1.123 +@  r0 = Start Address
   1.124 +@  r1 = Length
   1.125 +@---------------------------------------------------------------------------------
   1.126 +ClearMem:
   1.127 +@---------------------------------------------------------------------------------
   1.128 +	mov	r2, #3			@ Round down to nearest word boundary
   1.129 +	add	r1, r1, r2		@ Shouldn't be needed
   1.130 +	bics	r1, r1, r2		@ Clear 2 LSB (and set Z)
   1.131 +	bxeq	lr			@ Quit if copy size is 0
   1.132 +
   1.133 +	mov	r2, #0
   1.134 +ClrLoop:
   1.135 +	stmia	r0!, {r2}
   1.136 +	subs	r1, r1, #4
   1.137 +	bne	ClrLoop
   1.138 +	bx	lr
   1.139 +
   1.140 +@---------------------------------------------------------------------------------
   1.141 +@ Copy memory if length	!= 0
   1.142 +@  r1 = Source Address
   1.143 +@  r2 = Dest Address
   1.144 +@  r4 = Dest Address + Length
   1.145 +@---------------------------------------------------------------------------------
   1.146 +CopyMemCheck:
   1.147 +@---------------------------------------------------------------------------------
   1.148 +	cmp	r1, r2
   1.149 +	bxeq	lr
   1.150 +
   1.151 +	sub	r3, r4, r2		@ Is there any data to copy?
   1.152 +@---------------------------------------------------------------------------------
   1.153 +@ Copy memory
   1.154 +@  r1 = Source Address
   1.155 +@  r2 = Dest Address
   1.156 +@  r3 = Length
   1.157 +@---------------------------------------------------------------------------------
   1.158 +CopyMem:
   1.159 +@---------------------------------------------------------------------------------
   1.160 +	mov	r0, #3			@ These commands are used in cases where
   1.161 +	add	r3, r3, r0		@ the length is not a multiple of 4,
   1.162 +	bics	r3, r3, r0		@ even though it should be.
   1.163 +	bxeq	lr			@ Length is zero, so exit
   1.164 +CIDLoop:
   1.165 +	ldmia	r1!, {r0}
   1.166 +	stmia	r2!, {r0}
   1.167 +	subs	r3, r3, #4
   1.168 +	bne	CIDLoop
   1.169 +	bx	lr
   1.170 +
   1.171 +@---------------------------------------------------------------------------------
   1.172 +	.align
   1.173 +	.pool
   1.174 +
   1.175 +	.global __dsimode
   1.176 +__dsimode: .word
   1.177 +	.end
   1.178 +@---------------------------------------------------------------------------------