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1 #ifndef VDP_H_
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2 #define VDP_H_
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3
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4 #include <stdint.h>
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5
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6 #define VDP_PORT_DATA *((volatile uint16_t*)0xc00000)
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7 #define VDP_PORT_DATA32 *((volatile uint32_t*)0xc00000)
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8 #define VDP_PORT_CTL *((volatile uint16_t*)0xc00004)
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9 #define VDP_PORT_CTL32 *((volatile uint32_t*)0xc00004)
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10 #define VDP_PORT_HVCNT *((volatile uint16_t*)0xc00008)
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11 #define VDP_PORT_PSG *((volatile uint16_t*)0xc00010)
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12
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13 #define VDP_PORT_STATUS *((volatile uint16_t*)0xc00004)
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14
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15 enum {
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16 VDP_REG_MODE1 = 0,
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17 VDP_REG_MODE2 = 1,
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18 VDP_REG_NAMETAB_A = 2,
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19 VDP_REG_NAMETAB_WIN = 3,
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20 VDP_REG_NAMETAB_B = 4,
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21 VDP_REG_SPRITE_TAB = 5,
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22 VDP_REG_BGCOL = 7,
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23 VDP_REG_INTR = 10,
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24 VDP_REG_MODE3 = 11,
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25 VDP_REG_MODE4 = 12,
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26 VDP_REG_SCROLL_TAB = 13,
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27 VDP_REG_AUTOINC = 15,
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28 VDP_REG_SCROLL_SIZE = 16,
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29 VDP_REG_WIN_XPOS = 17,
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30 VDP_REG_WIN_YPOS = 18,
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31 VDP_REG_DMA_LEN_LOW = 19,
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32 VDP_REG_DMA_LEN_HIGH = 20,
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33 VDP_REG_DMA_SRC_LOW = 21,
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34 VDP_REG_DMA_SRC_MID = 22,
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35 VDP_REG_DMA_SRC_HIGH = 23,
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36
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37 VDP_NUM_REGS
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38 };
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39
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40 uint16_t vdp_reg_shadow[VDP_NUM_REGS];
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41
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42 /* access VDP memory */
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43 enum { VDP_MEM_READ, VDP_MEM_WRITE };
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44 enum {
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45 VDP_MEM_VRAM = 0,
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46 VDP_MEM_CRAM = 0xa, /* CD5->CD0: 0 0 r 0 w 0 */
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47 VDP_MEM_VSRAM = 4 /* CD5->CD0: 0 0 0 1 0 0 */
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48 };
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49
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50 static inline void vdp_setup_access(uint16_t addr, int rw, int memid)
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51 {
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52 uint32_t type;
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53 if(rw == VDP_MEM_WRITE) {
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54 type = (memid & 7) | 1;
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55 } else {
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56 type = memid & 0xc;
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57 }
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58
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59 VDP_PORT_CTL32 = (((uint32_t)addr & 0x3fff) << 16) | ((addr >> 14) & 3) |
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60 ((type << 2) & 0xf0) | (type << 30);
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61 }
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62
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63
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64 /* mode register 1 */
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65 enum {
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66 VDP_MODE1_BASE = 0x4,
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67 VDP_MODE1_HVCNT = 0x2,
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68 VDP_MODE1_HINTR = 0x10
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69 };
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70
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71 /* mode register 2 */
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72 enum {
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73 VDP_MODE2_BASE = 0x4,
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74 VDP_MODE2_V30CELL = 0x8,
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75 VDP_MODE2_DMA = 0x10,
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76 VDP_MODE2_VINTR = 0x20,
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77 VDP_MODE2_DISP = 0x40
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78 };
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79
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80 /* mode register 3 */
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81 enum {
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82 VDP_MODE3_BASE = 0,
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83 VDP_MODE3_HSCROLL_CELL = 2,
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84 VDP_MODE3_HSCROLL_LINE = 3,
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85 VDP_MODE3_VSCROLL_2CELL = 4,
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86 VDP_MODE3_EXTINTR = 8
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87 };
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88
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89 /* mode register 4 */
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90 enum {
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91 VDP_MODE4_BASE = 0,
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92 VDP_MODE4_H40CELL = 0x81,
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93 VDP_MODE4_ILACE = 2,
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94 VDP_MODE4_ILACE_2XRES = 6,
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95 VDP_MODE4_SH = 8 /* shadow/highlight enable */
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96 };
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97
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98 /* scroll size register */
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99 enum {
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100 VDP_SCROLL_H32 = 0,
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101 VDP_SCROLL_H64 = 1,
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102 VDP_SCROLL_H128 = 3,
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103 VDP_SCROLL_V32 = 0,
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104 VDP_SCROLL_V64 = 0x10,
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105 VDP_SCROLL_V128 = 0x30
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106 };
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107
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108 /* window X/Y position register */
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109 enum {
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110 VDP_WIN_LEFT = 0,
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111 VDP_WIN_UP = 0,
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112 VDP_WIN_RIGHT = 0x80,
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113 VDP_WIN_DOWN = 0x80,
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114 VDP_WIN_POSMASK = 0x1f
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115 };
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116
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117 #define VDP_PACK_RGB(r, g, b) \
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118 ((((uint16_t)(r) & 7) << 1) | (((uint16_t)(g) & 7) << 5) | (((uint16_t)(b) & 7) << 9))
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119
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120
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121 static inline void vdp_setreg(int reg, uint8_t value)
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122 {
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123 /*vdp_reg_shadow[reg] = value;*/
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124 VDP_PORT_CTL = (uint16_t)value | (reg << 8) | (uint16_t)0x8000;
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125 }
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126
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127 static inline uint16_t vdp_getreg(int reg)
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128 {
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129 return vdp_reg_shadow[reg];
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130 }
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131
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132 static inline uint16_t vdp_status(void)
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133 {
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134 return VDP_PORT_CTL;
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135 }
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136
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137 static inline void vdp_set_bgcolor(int palidx, int colidx)
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138 {
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139 vdp_setreg(VDP_REG_BGCOL, (colidx & 0xf) | (palidx << 4));
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140 }
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141
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142 static inline void vdp_set_autoinc(int stride)
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143 {
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144 vdp_setreg(VDP_REG_AUTOINC, stride);
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145 }
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146
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147 static inline void vdp_set_pal_entry(int pidx, int cidx, int r, int g, int b)
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148 {
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149 uint16_t paddr = (pidx << 5) | (cidx << 1);
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150
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151 vdp_setup_access(paddr, VDP_MEM_WRITE, VDP_MEM_CRAM);
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152 VDP_PORT_DATA = VDP_PACK_RGB(r, g, b);
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153 }
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154
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155 void vdp_init(void);
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156
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157 #endif /* VDP_H_ */
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