megadrive_test2
view src/vdp.h @ 1:2560a8be8cb8
hblank interrupt test
| author | John Tsiombikas <nuclear@member.fsf.org> |
|---|---|
| date | Tue, 14 Mar 2017 09:02:43 +0200 |
| parents | ce1b05082ac4 |
| children | 72ab63f262bf |
line source
1 #ifndef VDP_H_
2 #define VDP_H_
4 #include <stdint.h>
6 #define VDP_PORT_DATA *((volatile uint16_t*)0xc00000)
7 #define VDP_PORT_DATA32 *((volatile uint32_t*)0xc00000)
8 #define VDP_PORT_CTL *((volatile uint16_t*)0xc00004)
9 #define VDP_PORT_CTL32 *((volatile uint32_t*)0xc00004)
10 #define VDP_PORT_HVCNT *((volatile uint16_t*)0xc00008)
11 #define VDP_PORT_PSG *((volatile uint16_t*)0xc00010)
13 #define VDP_PORT_STATUS *((volatile uint16_t*)0xc00004)
15 enum {
16 VDP_REG_MODE1 = 0,
17 VDP_REG_MODE2 = 1,
18 VDP_REG_NAMETAB_A = 2,
19 VDP_REG_NAMETAB_WIN = 3,
20 VDP_REG_NAMETAB_B = 4,
21 VDP_REG_SPRITE_TAB = 5,
22 VDP_REG_BGCOL = 7,
23 VDP_REG_HINTR = 10,
24 VDP_REG_MODE3 = 11,
25 VDP_REG_MODE4 = 12,
26 VDP_REG_SCROLL_TAB = 13,
27 VDP_REG_AUTOINC = 15,
28 VDP_REG_SCROLL_SIZE = 16,
29 VDP_REG_WIN_XPOS = 17,
30 VDP_REG_WIN_YPOS = 18,
31 VDP_REG_DMA_LEN_LOW = 19,
32 VDP_REG_DMA_LEN_HIGH = 20,
33 VDP_REG_DMA_SRC_LOW = 21,
34 VDP_REG_DMA_SRC_MID = 22,
35 VDP_REG_DMA_SRC_HIGH = 23,
37 VDP_NUM_REGS
38 };
40 uint16_t vdp_reg_shadow[VDP_NUM_REGS];
42 /* access VDP memory */
43 enum { VDP_MEM_READ, VDP_MEM_WRITE };
44 enum {
45 VDP_MEM_VRAM = 0,
46 VDP_MEM_CRAM = 0xa, /* CD5->CD0: 0 0 r 0 w 0 */
47 VDP_MEM_VSRAM = 4 /* CD5->CD0: 0 0 0 1 0 0 */
48 };
50 static inline void vdp_setup_access(uint16_t addr, int rw, int memid)
51 {
52 uint32_t type;
53 if(rw == VDP_MEM_WRITE) {
54 type = (memid & 7) | 1;
55 } else {
56 type = memid & 0xc;
57 }
59 VDP_PORT_CTL32 = (((uint32_t)addr & 0x3fff) << 16) | ((addr >> 14) & 3) |
60 ((type << 2) & 0xf0) | (type << 30);
61 }
64 /* mode register 1 */
65 enum {
66 VDP_MODE1_BASE = 0x4,
67 VDP_MODE1_HVCNT = 0x2,
68 VDP_MODE1_HINTR = 0x10
69 };
71 /* mode register 2 */
72 enum {
73 VDP_MODE2_BASE = 0x4,
74 VDP_MODE2_V30CELL = 0x8,
75 VDP_MODE2_DMA = 0x10,
76 VDP_MODE2_VINTR = 0x20,
77 VDP_MODE2_DISP = 0x40
78 };
80 /* mode register 3 */
81 enum {
82 VDP_MODE3_BASE = 0,
83 VDP_MODE3_HSCROLL_CELL = 2,
84 VDP_MODE3_HSCROLL_LINE = 3,
85 VDP_MODE3_VSCROLL_2CELL = 4,
86 VDP_MODE3_EXTINTR = 8
87 };
89 /* mode register 4 */
90 enum {
91 VDP_MODE4_BASE = 0,
92 VDP_MODE4_H40CELL = 0x81,
93 VDP_MODE4_ILACE = 2,
94 VDP_MODE4_ILACE_2XRES = 6,
95 VDP_MODE4_SH = 8 /* shadow/highlight enable */
96 };
98 /* scroll size register */
99 enum {
100 VDP_SCROLL_H32 = 0,
101 VDP_SCROLL_H64 = 1,
102 VDP_SCROLL_H128 = 3,
103 VDP_SCROLL_V32 = 0,
104 VDP_SCROLL_V64 = 0x10,
105 VDP_SCROLL_V128 = 0x30
106 };
108 /* window X/Y position register */
109 enum {
110 VDP_WIN_LEFT = 0,
111 VDP_WIN_UP = 0,
112 VDP_WIN_RIGHT = 0x80,
113 VDP_WIN_DOWN = 0x80,
114 VDP_WIN_POSMASK = 0x1f
115 };
117 #define VDP_PACK_RGB(r, g, b) \
118 ((((uint16_t)(r) & 7) << 1) | (((uint16_t)(g) & 7) << 5) | (((uint16_t)(b) & 7) << 9))
121 static inline void vdp_setreg(int reg, uint8_t value)
122 {
123 vdp_reg_shadow[reg] = value;
124 VDP_PORT_CTL = (uint16_t)value | (reg << 8) | (uint16_t)0x8000;
125 }
127 static inline uint16_t vdp_getreg(int reg)
128 {
129 return vdp_reg_shadow[reg];
130 }
132 static inline uint16_t vdp_status(void)
133 {
134 return VDP_PORT_CTL;
135 }
137 static inline void vdp_set_bgcolor(int palidx, int colidx)
138 {
139 vdp_setreg(VDP_REG_BGCOL, (colidx & 0xf) | (palidx << 4));
140 }
142 static inline void vdp_set_autoinc(int stride)
143 {
144 vdp_setreg(VDP_REG_AUTOINC, stride);
145 }
147 static inline void vdp_set_pal_entry(int pidx, int cidx, int r, int g, int b)
148 {
149 uint16_t paddr = (pidx << 5) | (cidx << 1);
151 vdp_setup_access(paddr, VDP_MEM_WRITE, VDP_MEM_CRAM);
152 VDP_PORT_DATA = VDP_PACK_RGB(r, g, b);
153 }
155 static inline void vdp_enable_vintr(void)
156 {
157 vdp_setreg(VDP_REG_MODE2, vdp_getreg(VDP_REG_MODE2) | VDP_MODE2_VINTR);
158 }
160 static inline void vdp_disable_vintr(void)
161 {
162 vdp_setreg(VDP_REG_MODE2, vdp_getreg(VDP_REG_MODE2) & ~VDP_MODE2_VINTR);
163 }
165 static inline void vdp_enable_hintr(int counter)
166 {
167 vdp_setreg(VDP_REG_HINTR, counter);
168 vdp_setreg(VDP_REG_MODE1, vdp_getreg(VDP_REG_MODE1) | VDP_MODE1_HINTR);
169 }
171 static inline void vdp_disable_hintr(void)
172 {
173 vdp_setreg(VDP_REG_MODE1, vdp_getreg(VDP_REG_MODE1) & ~VDP_MODE1_HINTR);
174 }
176 void vdp_init(void);
178 #endif /* VDP_H_ */