kern
view src/ata.c @ 88:a398bf73fe93
- added the partition table parsing code
- starting with the filesystem
| author | John Tsiombikas <nuclear@member.fsf.org> |
|---|---|
| date | Thu, 08 Dec 2011 13:34:47 +0200 |
| parents | 178d5a95e6de |
| children | 2f555c81ae67 |
line source
1 #include <stdio.h>
2 #include <stdlib.h>
3 #include <string.h>
4 #include <ctype.h>
5 #include <inttypes.h>
6 #include <assert.h>
7 #include "ata.h"
8 #include "intr.h"
9 #include "asmops.h"
10 #include "sched.h"
11 #include "mutex.h"
13 /* registers */
14 #define REG_DATA 0 /* R/W */
15 #define REG_ERROR 1 /* R */
16 #define REG_FEATURES 1 /* W */
17 #define REG_COUNT 2 /* R/W */
18 #define REG_LBA0 3 /* R/W */
19 #define REG_LBA1 4 /* R/W */
20 #define REG_LBA2 5 /* R/W */
21 #define REG_DEVICE 6 /* R/W */
22 #define REG_CMD 7 /* W */
23 #define REG_STATUS 7 /* R */
25 #define REG_CTL 518
26 #define REG_ALTSTAT 518
28 /* status bit fields */
29 #define ST_ERR (1 << 0)
30 #define ST_DRQ (1 << 3)
31 #define ST_DRDY (1 << 6)
32 #define ST_BSY (1 << 7)
34 /* device select bit in control register */
35 #define DEV_SEL(x) (((x) & 1) << 4)
36 #define DEV_LBA (1 << 6)
38 /* ATA commands */
39 #define CMD_IDENTIFY 0xec
40 #define CMD_READ 0x20
41 #define CMD_READ48 0x24
42 #define CMD_WRITE 0x30
43 #define CMD_WRITE48 0x34
46 struct device {
47 int id; /* id of the device on its ATA interface (0 master, 1 slave) */
48 int iface; /* ATA interface for this device (0 or 1) */
49 int port_base; /* interface I/O port base */
51 uint32_t nsect_lba;
52 uint64_t nsect_lba48;
53 };
56 static int identify(struct device *dev, int iface, int id);
57 static void select_dev(struct device *dev);
58 static int wait_busy(struct device *dev);
59 static int wait_drq(struct device *dev);
60 static void read_data(struct device *dev, void *buf);
61 static inline uint8_t read_reg8(struct device *dev, int reg);
62 static inline uint16_t read_reg16(struct device *dev, int reg);
63 static inline void write_reg8(struct device *dev, int reg, uint8_t val);
64 static inline void write_reg16(struct device *dev, int reg, uint16_t val);
65 static void ata_intr(int inum);
66 static void *atastr(void *res, void *src, int n);
67 static char *size_str(uint64_t nsect, char *buf);
68 static void print_error(int devid, int wr, uint32_t high, uint32_t low, unsigned char err);
70 /* last drive selected on each bus */
71 static int drvsel[2] = {-1, -1};
73 /* 4 possible devices: 2 ATA interfaces with 2 devices each.
74 * this will never change unless we start querying the PCI config space
75 * for additional drives (in which case this whole init code must be
76 * rewritten anyway), but I like it spelt out like this.
77 */
78 #define MAX_IFACES 2
79 #define MAX_DEV (MAX_IFACES * 2)
80 static struct device devices[MAX_DEV];
81 static int ndev;
83 /* This serves as a sync point for I/O. While the mutex is held,
84 * some process is doing I/O and all the others must wait.
85 */
86 static mutex_t pending;
89 void init_ata(void)
90 {
91 int i;
93 interrupt(IRQ_TO_INTR(15), ata_intr);
95 ndev = 0;
96 for(i=0; i<MAX_DEV; i++) {
97 int iface = i / MAX_IFACES;
98 int id = i % MAX_IFACES;
100 if(identify(devices + ndev, iface, id) == 0) {
101 ndev++;
102 }
103 }
104 }
106 int ata_num_devices(void)
107 {
108 return ndev;
109 }
111 int ata_read_pio(int devno, uint64_t sect, void *buf)
112 {
113 int use_irq, cmd, st, res = -1;
114 uint32_t sect_low, sect_high;
115 struct device *dev = devices + devno;
117 if(dev->id == -1) {
118 return -1;
119 }
120 use_irq = get_current_proc() != 0;
122 if(use_irq) {
123 /* wait for the interface to become available */
124 mutex_lock(&pending);
125 }
127 select_dev(dev);
129 /* LBA48 requires the high-order bits first */
130 if(sect >= dev->nsect_lba) {
131 sect_high = (uint32_t)(sect >> 24);
132 sect_low = (uint32_t)sect & 0xffffff;
134 if(sect >= dev->nsect_lba48) {
135 goto end;
136 }
137 cmd = CMD_READ48;
139 write_reg8(dev, REG_COUNT, 0);
140 write_reg8(dev, REG_LBA0, sect_high & 0xff);
141 write_reg8(dev, REG_LBA1, (sect_high >> 8) & 0xff);
142 write_reg8(dev, REG_LBA2, (sect_high >> 16) & 0xff);
143 } else {
144 cmd = CMD_READ;
145 sect_high = 0;
146 sect_low = (uint32_t)sect & 0xfffffff;
147 }
149 write_reg8(dev, REG_COUNT, 1);
150 write_reg8(dev, REG_LBA0, sect_low & 0xff);
151 write_reg8(dev, REG_LBA1, (sect_low >> 8) & 0xff);
152 write_reg8(dev, REG_LBA2, (sect_low >> 16) & 0xff);
153 write_reg8(dev, REG_DEVICE, ((sect_low >> 24) & 0xf) | DEV_LBA | DEV_SEL(dev->id));
154 /* execute */
155 write_reg8(dev, REG_CMD, cmd);
157 /* wait for the data to become available */
158 do {
159 if(use_irq) {
160 /* also sleep on the mutex if we're called from userspace */
161 wait(&pending);
162 }
163 } while(((st = read_reg8(dev, REG_ALTSTAT)) & (ST_DRQ | ST_ERR)) == 0);
165 if(st & ST_ERR) {
166 //print_error(int devid, int wr, uint32_t high, uint32_t low, unsigned char err);
167 unsigned char err;
169 err = read_reg8(dev, REG_ERROR);
170 print_error(devno, 0, sect_high, sect_low, err);
171 goto end;
172 }
174 /* read the data and we're done */
175 read_data(dev, buf);
176 res = 0;
177 end:
178 if(use_irq) {
179 mutex_unlock(&pending);
180 }
181 return res;
182 }
184 int ata_write_pio(int devno, uint64_t sect, void *buf)
185 {
186 if(devices[devno].id == -1) {
187 return -1;
188 }
189 return -1;
190 }
192 static int identify(struct device *dev, int iface, int id)
193 {
194 /* base address of the two ATA interfaces */
195 static const int port_base[] = {0x1f0, 0x170};
196 unsigned char st;
197 uint16_t *info;
198 char textbuf[42]; /* at most we need 40 chars for ident strings */
200 dev->id = id;
201 dev->iface = iface;
202 dev->port_base = port_base[iface];
204 /* a status of 0xff means there's no drive on the interface */
205 if((st = read_reg8(dev, REG_ALTSTAT)) == 0xff) {
206 return -1;
207 }
209 select_dev(dev);
211 write_reg8(dev, REG_CMD, CMD_IDENTIFY);
213 if(!(st = read_reg8(dev, REG_ALTSTAT)) || (st & ST_ERR)) {
214 /* does not exist */
215 return -1;
216 }
217 if(wait_busy(dev) == -1) {
218 /* got ST_ERR, not ATA */
219 return -1;
220 }
222 info = malloc(512);
223 assert(info);
225 /* read the device information */
226 read_data(dev, info);
228 /* print model and serial */
229 printf("ata%d: %s", (dev->iface << 1) | dev->id, atastr(textbuf, info + 27, 40));
230 printf(" [s/n: %s]", atastr(textbuf, info + 10, 20));
232 dev->nsect_lba = *(uint32_t*)(info + 60);
233 dev->nsect_lba48 = *(uint64_t*)(info + 100) & 0xffffffffffffull;
235 if(!dev->nsect_lba) {
236 printf(" drive does not support LBA, ignoring!\n");
237 free(info);
238 return -1;
239 }
241 if(dev->nsect_lba48) {
242 size_str(dev->nsect_lba48, textbuf);
243 } else {
244 size_str(dev->nsect_lba, textbuf);
245 }
246 printf(" size: %s\n", textbuf);
248 free(info);
249 return 0;
250 }
252 static void select_dev(struct device *dev)
253 {
254 /* if this is the currently selected device, thy work is done */
255 if(drvsel[dev->iface] == dev->id)
256 return;
258 /* wait for BSY and DRQ to clear */
259 while(read_reg8(dev, REG_ALTSTAT) & (ST_BSY | ST_DRQ));
261 /* set the correct device bit to the device register */
262 write_reg8(dev, REG_DEVICE, DEV_SEL(dev->id));
264 /* wait a bit to allow the device time to respond */
265 iodelay(); iodelay(); iodelay(); iodelay();
266 }
268 static int wait_busy(struct device *dev)
269 {
270 unsigned char st;
272 do {
273 st = read_reg8(dev, REG_ALTSTAT);
274 } while((st & ST_BSY) && !(st & ST_ERR));
276 return st & ST_ERR ? -1 : 0;
277 }
279 static int wait_drq(struct device *dev)
280 {
281 unsigned char st;
283 do {
284 st = read_reg8(dev, REG_ALTSTAT);
285 } while(!(st & (ST_DRQ | ST_ERR)));
287 return st & ST_ERR ? -1 : 0;
288 }
290 static void read_data(struct device *dev, void *buf)
291 {
292 int i;
293 uint16_t *ptr = buf;
295 /* wait for the data request from the drive */
296 wait_drq(dev);
298 /* ready to transfer */
299 for(i=0; i<256; i++) {
300 *ptr++ = read_reg16(dev, REG_DATA);
301 }
302 }
304 static inline uint8_t read_reg8(struct device *dev, int reg)
305 {
306 uint8_t val;
307 inb(val, dev->port_base + reg);
308 return val;
309 }
311 static inline uint16_t read_reg16(struct device *dev, int reg)
312 {
313 uint16_t val;
314 inw(val, dev->port_base + reg);
315 return val;
316 }
318 static inline void write_reg8(struct device *dev, int reg, uint8_t val)
319 {
320 outb(val, dev->port_base + reg);
321 }
323 static inline void write_reg16(struct device *dev, int reg, uint16_t val)
324 {
325 outw(val, dev->port_base + reg);
326 }
328 static void ata_intr(int inum)
329 {
330 printf("ATA interrupt\n");
331 }
333 static void *atastr(void *res, void *src, int n)
334 {
335 int i;
336 uint16_t *sptr = (uint16_t*)src;
337 char *dptr = res;
339 for(i=0; i<n/2; i++) {
340 *dptr++ = (*sptr & 0xff00) >> 8;
341 *dptr++ = *sptr++ & 0xff;
342 }
344 while(isspace(*--dptr));
345 *++dptr = 0;
346 return res;
347 }
349 static char *size_str(uint64_t nsect, char *buf)
350 {
351 static const char *suffix[] = {"kb", "mb", "gb", "tb", "pb", 0};
352 int i;
353 unsigned int rem;
355 /* start with kilobytes */
356 nsect /= 2;
358 for(i=0; nsect >= 1024 && suffix[i + 1]; i++) {
359 rem = nsect % 1024;
360 nsect /= 1024;
361 }
362 sprintf(buf, "%u.%u%s", (unsigned int)nsect, 100 * rem / 1024, suffix[i]);
363 return buf;
364 }
366 #define ERR_NM (1 << 1)
367 #define ERR_ABRT (1 << 2)
368 #define ERR_MCR (1 << 3)
369 #define ERR_IDNF (1 << 4)
370 #define ERR_MC (1 << 5)
371 #define ERR_UNC (1 << 6)
373 static void print_error(int devid, int wr, uint32_t high, uint32_t low, unsigned char err)
374 {
375 printf("ata%d %s %serror ", devid, wr ? "write" : "read", err & ERR_UNC ? "uncorrectable " : "");
376 printf("at sector %x%x: ", high, low);
378 if(err & ERR_ABRT)
379 printf("abort ");
380 if(err & ERR_IDNF)
381 printf("invalid address ");
382 if(err & ERR_NM)
383 printf("no media ");
385 printf("(%x)\n", (unsigned int)err);
386 }