| rev |
line source |
|
nuclear@1
|
1 #ifndef ASMOPS_H_
|
|
nuclear@1
|
2 #define ASMOPS_H_
|
|
nuclear@1
|
3
|
|
nuclear@42
|
4 /* general purpose registers as they are pushed by pusha */
|
|
nuclear@42
|
5 struct registers {
|
|
nuclear@42
|
6 uint32_t edi, esi, ebp, esp;
|
|
nuclear@42
|
7 uint32_t ebx, edx, ecx, eax;
|
|
nuclear@42
|
8 } __attribute__ ((packed));
|
|
nuclear@42
|
9
|
|
nuclear@10
|
10 #define enable_intr() asm volatile("sti")
|
|
nuclear@10
|
11 #define disable_intr() asm volatile("cli")
|
|
nuclear@10
|
12 #define halt_cpu() asm volatile("hlt")
|
|
nuclear@10
|
13
|
|
nuclear@1
|
14 #define inb(dest, port) asm volatile( \
|
|
nuclear@1
|
15 "inb %1, %0\n\t" \
|
|
nuclear@2
|
16 : "=a" ((unsigned char)(dest)) \
|
|
nuclear@2
|
17 : "dN" ((unsigned short)(port)))
|
|
nuclear@1
|
18
|
|
nuclear@10
|
19 #define inw(dest, port) asm volatile( \
|
|
nuclear@10
|
20 "inw %1, %0\n\t" \
|
|
nuclear@2
|
21 : "=a" ((unsigned short)(dest)) \
|
|
nuclear@2
|
22 : "dN" ((unsigned short)(port)))
|
|
nuclear@1
|
23
|
|
nuclear@1
|
24 #define inl(dest, port) asm volatile( \
|
|
nuclear@1
|
25 "inl %1, %0\n\t" \
|
|
nuclear@2
|
26 : "=a" ((unsigned long)(dest)) \
|
|
nuclear@2
|
27 : "dN" ((unsigned short)(port)))
|
|
nuclear@1
|
28
|
|
nuclear@1
|
29 #define outb(src, port) asm volatile( \
|
|
nuclear@1
|
30 "outb %0, %1\n\t" \
|
|
nuclear@2
|
31 :: "a" ((unsigned char)(src)), "dN" ((unsigned short)(port)))
|
|
nuclear@1
|
32
|
|
nuclear@10
|
33 #define outw(src, port) asm volatile( \
|
|
nuclear@10
|
34 "outw %0, %1\n\t" \
|
|
nuclear@2
|
35 :: "a" ((unsigned short)(src)), "dN" ((unsigned short)(port)))
|
|
nuclear@1
|
36
|
|
nuclear@1
|
37 #define outl(src, port) asm volatile( \
|
|
nuclear@1
|
38 "outl %0, %1\n\t" \
|
|
nuclear@2
|
39 :: "a" ((unsigned long)(src)), "dN" ((unsigned short)(port)))
|
|
nuclear@1
|
40
|
|
nuclear@36
|
41 #define iodelay() outb(0, 0x80)
|
|
nuclear@36
|
42
|
|
nuclear@1
|
43 #endif /* ASMOPS_H_ */
|
