test_simm30_dram

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added readme and hardware
author John Tsiombikas <nuclear@member.fsf.org>
date Thu, 09 Mar 2017 08:45:11 +0200
parents bd6ad00cb1bc
children
line source
1 \.o$
2 \.swp$
3 \.eep$
4 \.hex$
5 \.map$
6 ^test_simm72_dram$
7 cache\.lib$
8 \.bak$
9 \.kicad_pcb-bak$
10 \.net$
11 \.dcm$