1.1 --- a/test.c	Thu Mar 09 08:45:11 2017 +0200
     1.2 +++ b/test.c	Sun Jun 04 02:56:55 2017 +0300
     1.3 @@ -1,5 +1,5 @@
     1.4  /*
     1.5 -72pin SIMM DRAM tester.
     1.6 +30pin SIMM DRAM tester.
     1.7  Copyright (C) 2017  John Tsiombikas <nuclear@member.fsf.org>
     1.8  
     1.9  This program is free software: you can redistribute it and/or modify
    1.10 @@ -31,14 +31,12 @@
    1.11   * A[0,7]	data
    1.12   * B[0,7]	A0 - A7
    1.13   * C[0,3]	A8 - A11
    1.14 - * D7		CAS3
    1.15 - * D6		RAS2
    1.16 - * D5		RAS3
    1.17 + * D7		CAS
    1.18 + * D6		RAS
    1.19   */
    1.20  
    1.21 -#define CAS3_BIT	0x80
    1.22 -#define RAS2_BIT	0x40
    1.23 -#define RAS3_BIT	0x20
    1.24 +#define CAS_BIT	0x80
    1.25 +#define RAS_BIT	0x40
    1.26  #define WE_BIT		0x04
    1.27  
    1.28  void proc_cmd(char *cmd);
    1.29 @@ -62,7 +60,6 @@
    1.30  /* SIMM access config */
    1.31  static int addr_bits;
    1.32  static uint32_t addr_mask;
    1.33 -static int ras_lines = 1;
    1.34  static long memsize_kb;	/* derived from the above */
    1.35  
    1.36  int main(void)
    1.37 @@ -205,13 +202,6 @@
    1.38  		} else {
    1.39  			fprintf(stderr, "invalid address bits value: %ld\n", value);
    1.40  		}
    1.41 -	} else if(strcmp(name, "ras_lines") == 0) {
    1.42 -		if(value > 0 && value <= 2) {
    1.43 -			ras_lines = value;
    1.44 -			printf("RAS lines: %d\n", ras_lines);
    1.45 -		} else {
    1.46 -			fprintf(stderr, "invalid RAS lines value: %ld\n", value);
    1.47 -		}
    1.48  	} else {
    1.49  		fprintf(stderr, "unknown variable: %s\n", name);
    1.50  	}
    1.51 @@ -239,10 +229,9 @@
    1.52  	printf("Detecting memory ...\n");
    1.53  	dram_detect();
    1.54  
    1.55 -	memsize_kb = ((uint32_t)1 << (addr_bits * 2)) * 4 * ras_lines;
    1.56 +	memsize_kb = ((uint32_t)1 << addr_bits);
    1.57  
    1.58  	printf("Address lines: %d\n", addr_bits);
    1.59 -	printf("RAS lines: %d\n", ras_lines);
    1.60  	printf("Memory size: %ldmb (%ldkb)\n", memsize_kb >> 20, memsize_kb >> 10);
    1.61  }
    1.62  
    1.63 @@ -267,22 +256,22 @@
    1.64  
    1.65  void dram_assert_cas(void)
    1.66  {
    1.67 -	PORTD &= ~CAS3_BIT;
    1.68 +	PORTD &= ~CAS_BIT;
    1.69  }
    1.70  
    1.71  void dram_release_cas(void)
    1.72  {
    1.73 -	PORTD |= CAS3_BIT;
    1.74 +	PORTD |= CAS_BIT;
    1.75  }
    1.76  
    1.77 -void dram_assert_ras(unsigned char bits)
    1.78 +void dram_assert_ras(void)
    1.79  {
    1.80 -	PORTD &= ~bits;
    1.81 +	PORTD &= ~RAS_BIT;
    1.82  }
    1.83  
    1.84 -void dram_release_ras(unsigned char bits)
    1.85 +void dram_release_ras(void)
    1.86  {
    1.87 -	PORTD |= bits;
    1.88 +	PORTD |= RAS_BIT;
    1.89  }
    1.90  
    1.91  void dram_set_we(void)
    1.92 @@ -327,13 +316,6 @@
    1.93  		fprintf(stderr, "Failed to detect DRAM configuration (address lines)...\n");
    1.94  		return;
    1.95  	}
    1.96 -
    1.97 -	/* now detect if there's a second ras pair */
    1.98 -	++addr;	/* addr was already the highest of the first bank, see if there's a second */
    1.99 -	ras_lines = 2;
   1.100 -	if(memtest(addr) != 0) {
   1.101 -		ras_lines = 1;
   1.102 -	}
   1.103  }
   1.104  
   1.105  int memtest(uint32_t addr)
   1.106 @@ -342,7 +324,7 @@
   1.107  	unsigned char pat[] = { 0xf0, 0x0f, 0xaa, 0x55, 0xc0, 0x30, 0x0c, 0x03 };
   1.108  	unsigned char val;
   1.109  
   1.110 -	printf("testing address: %lx (a:%d,r:%d)\n", (unsigned long)addr, addr_bits, ras_lines);
   1.111 +	printf("testing address: %lx (a:%d)\n", (unsigned long)addr, addr_bits);
   1.112  
   1.113  	for(i=0; i<sizeof pat / sizeof *pat; i++) {
   1.114  		dram_write(addr, pat[i]);
   1.115 @@ -357,26 +339,25 @@
   1.116  void dram_refresh(void)
   1.117  {
   1.118  	dram_assert_cas();
   1.119 -	dram_assert_ras(RAS2_BIT | RAS3_BIT);
   1.120 +	dram_assert_ras();
   1.121  	dram_release_cas();
   1.122 -	dram_release_ras(RAS2_BIT | RAS3_BIT);
   1.123 +	dram_release_ras();
   1.124  }
   1.125  
   1.126  void dram_write(uint32_t addr, unsigned char val)
   1.127  {
   1.128  	uint32_t row_addr = (addr >> addr_bits) & addr_mask;
   1.129  	uint32_t col_addr = addr & addr_mask;
   1.130 -	unsigned char ras = (addr >> (addr_bits * 2)) ? RAS3_BIT : RAS2_BIT;
   1.131  
   1.132  	dram_set_data(val);
   1.133  	dram_set_we();
   1.134  	/* set row address */
   1.135  	dram_set_addr(row_addr);
   1.136 -	dram_assert_ras(ras);
   1.137 +	dram_assert_ras();
   1.138  	/* set column address */
   1.139  	dram_set_addr(col_addr);
   1.140  	dram_assert_cas();
   1.141 -	dram_release_ras(ras);
   1.142 +	dram_release_ras();
   1.143  	dram_release_cas();
   1.144  	dram_release_data();
   1.145  	dram_clear_we();
   1.146 @@ -387,7 +368,6 @@
   1.147  	unsigned char val;
   1.148  	uint32_t row_addr = (addr >> addr_bits) & addr_mask;
   1.149  	uint32_t col_addr = addr & addr_mask;
   1.150 -	unsigned char ras = (addr >> (addr_bits * 2)) ? RAS3_BIT : RAS2_BIT;
   1.151  
   1.152  	dram_clear_we();
   1.153  	/* this is necessary to remove previous data from the lines when no-one is driving them
   1.154 @@ -398,14 +378,14 @@
   1.155  
   1.156  	/* set row address */
   1.157  	dram_set_addr(row_addr);
   1.158 -	dram_assert_ras(ras);
   1.159 +	dram_assert_ras();
   1.160  	/* set column address */
   1.161  	dram_set_addr(col_addr);
   1.162  	dram_assert_cas();
   1.163  
   1.164  	val = PINA;
   1.165  
   1.166 -	dram_release_ras(ras);
   1.167 +	dram_release_ras();
   1.168  	dram_release_cas();
   1.169  
   1.170  	return val;