nuclear@0: #ifndef DSREGS_H_ nuclear@0: #define DSREGS_H_ nuclear@0: nuclear@0: #include nuclear@0: nuclear@0: #define REG_BASE 0x4000000 nuclear@0: #define REG8(x) (*(volatile int8_t*)(REG_BASE + (x))) nuclear@0: #define REG16(x) (*(volatile int16_t*)(REG_BASE + (x))) nuclear@0: #define REG32(x) (*(volatile int32_t*)(REG_BASE + (x))) nuclear@0: #define REG64(x) (*(volatile int64_t*)(REG_BASE + (x))) nuclear@0: nuclear@0: /* ---- display engine A ---- */ nuclear@0: #define REG_DISPCNT REG32(0x00) nuclear@0: #define REG_DISPSTAT REG16(0x04) nuclear@0: #define REG_VCOUNT REG16(0x06) nuclear@0: #define REG_BG0CNT REG16(0x08) nuclear@0: #define REG_BG1CNT REG16(0x0a) nuclear@0: #define REG_BG2CNT REG16(0x0c) nuclear@0: #define REG_BG3CNT REG16(0x0e) nuclear@0: /* scrolling registers */ nuclear@0: #define REG_BG0HOFS REG16(0x10) nuclear@0: #define REG_BG0VOFS REG16(0x12) nuclear@0: #define REG_BG1HOFS REG16(0x14) nuclear@0: #define REG_BG1VOFS REG16(0x16) nuclear@0: #define REG_BG2HOFS REG16(0x18) nuclear@0: #define REG_BG2VOFS REG16(0x1a) nuclear@0: #define REG_BG3HOFS REG16(0x1c) nuclear@0: #define REG_BG3VOFS REG16(0x1e) nuclear@0: /* BG rotation and scaling registers */ nuclear@0: #define REG_BG2PA REG16(0x20) nuclear@0: #define REG_BG2PB REG16(0x22) nuclear@0: #define REG_BG2PC REG16(0x24) nuclear@0: #define REG_BG2PD REG16(0x26) nuclear@0: #define REG_BG2X REG32(0x28) nuclear@0: #define REG_BG2Y REG32(0x2c) nuclear@0: #define REG_BG3PA REG16(0x30) nuclear@0: #define REG_BG3PB REG16(0x32) nuclear@0: #define REG_BG3PC REG16(0x34) nuclear@0: #define REG_BG3PD REG16(0x36) nuclear@0: #define REG_BG3X REG32(0x38) nuclear@0: #define REG_BG3Y REG32(0x3c) nuclear@0: /* window registers */ nuclear@0: #define REG_WIN0H REG16(0x40) nuclear@0: #define REG_WIN1H REG16(0x42) nuclear@0: #define REG_WIN0V REG16(0x44) nuclear@0: #define REG_WIN1V REG16(0x46) nuclear@0: #define REG_WININ REG16(0x48) nuclear@0: #define REG_WINOUT REG16(0x4a) nuclear@0: /* mosaic */ nuclear@0: #define REG_MOSAIC REG16(0x4c) nuclear@0: /* color effects */ nuclear@0: #define REG_BLDCNT REG16(0x50) nuclear@0: #define REG_BLDALPHA REG16(0x52) nuclear@0: #define REG_BLDY REG16(0x54) nuclear@0: nuclear@0: #define REG_DISP3DCNT REG16(0x60) nuclear@0: #define REG_DISPCAPCNT REG32(0x64) nuclear@0: #define REG_DISP_MMEM_FIFO REG32(0x68) nuclear@0: #define REG_MASTER_BRIGHT REG16(0x6c) nuclear@0: nuclear@0: /* ---- display engine B ---- */ nuclear@0: #define REG_B_DISPCNT REG32(0x1000) nuclear@0: #define REG_B_BG0CNT REG16(0x1008) nuclear@0: #define REG_B_BG1CNT REG16(0x100a) nuclear@0: #define REG_B_BG2CNT REG16(0x100c) nuclear@0: #define REG_B_BG3CNT REG16(0x100e) nuclear@0: /* scrolling registers */ nuclear@0: #define REG_B_BG0HOFS REG16(0x1010) nuclear@0: #define REG_B_BG0VOFS REG16(0x1012) nuclear@0: #define REG_B_BG1HOFS REG16(0x1014) nuclear@0: #define REG_B_BG1VOFS REG16(0x1016) nuclear@0: #define REG_B_BG2HOFS REG16(0x1018) nuclear@0: #define REG_B_BG2VOFS REG16(0x101a) nuclear@0: #define REG_B_BG3HOFS REG16(0x101c) nuclear@0: #define REG_B_BG3VOFS REG16(0x101e) nuclear@0: /* BG rotation and scaling registers */ nuclear@0: #define REG_B_BG2PA REG16(0x1020) nuclear@0: #define REG_B_BG2PB REG16(0x1022) nuclear@0: #define REG_B_BG2PC REG16(0x1024) nuclear@0: #define REG_B_BG2PD REG16(0x1026) nuclear@0: #define REG_B_BG2X REG32(0x1028) nuclear@0: #define REG_B_BG2Y REG32(0x102c) nuclear@0: #define REG_B_BG3PA REG16(0x1030) nuclear@0: #define REG_B_BG3PB REG16(0x1032) nuclear@0: #define REG_B_BG3PC REG16(0x1034) nuclear@0: #define REG_B_BG3PD REG16(0x1036) nuclear@0: #define REG_B_BG3X REG32(0x1038) nuclear@0: #define REG_B_BG3Y REG32(0x103c) nuclear@0: /* window registers */ nuclear@0: #define REG_B_WIN0H REG16(0x1040) nuclear@0: #define REG_B_WIN1H REG16(0x1042) nuclear@0: #define REG_B_WIN0V REG16(0x1044) nuclear@0: #define REG_B_WIN1V REG16(0x1046) nuclear@0: #define REG_B_WININ REG16(0x1048) nuclear@0: #define REG_B_WINOUT REG16(0x104a) nuclear@0: /* mosaic */ nuclear@0: #define REG_B_MOSAIC REG16(0x104c) nuclear@0: /* color effects */ nuclear@0: #define REG_B_BLDCNT REG16(0x1050) nuclear@0: #define REG_B_BLDALPHA REG16(0x1052) nuclear@0: #define REG_B_BLDY REG16(0x1054) nuclear@0: nuclear@0: #define REG_B_MASTER_BRIGHT REG16(0x106c) nuclear@0: nuclear@0: nuclear@0: #define DISPCNT_BGMODE(x) (x) nuclear@0: #define DISPCNT_MODE(x) ((uint32_t)(x) << 16) nuclear@0: #define DISPCNT_BG0_3D 0x00000008 nuclear@0: #define DISPCNT_TILE_OBJ_1DMAP 0x00000010 nuclear@0: #define DISPCNT_BM_OBJ_256X256 0x00000020 nuclear@0: #define DISPCNT_BM_OBJ_1DMAP 0x00000040 nuclear@0: #define DISPCNT_BLANK 0x00000080 nuclear@0: #define DISPCNT_BG0 0x00000100 nuclear@0: #define DISPCNT_BG1 0x00000200 nuclear@0: #define DISPCNT_BG2 0x00000400 nuclear@0: #define DISPCNT_BG3 0x00000800 nuclear@0: #define DISPCNT_OBJ 0x00001000 nuclear@0: #define DISPCNT_WIN0 0x00002000 nuclear@0: #define DISPCNT_WIN1 0x00004000 nuclear@0: #define DISPCNT_OBJWIN 0x00008000 nuclear@0: nuclear@0: #define BGXCNT_PRIO(x) (x) nuclear@0: #define BGXCNT_CHARBASE(x) ((x) << 2) nuclear@0: #define BGXCNT_MOSAIC 0x0040 nuclear@0: #define BGXCNT_COL_256 0x0080 nuclear@0: #define BGXCNT_BM 0x0080 nuclear@0: #define BGXCNT_SCRBASE(x) ((x) << 8) nuclear@0: #define BGXCNT_OVF_WRAP 0x2000 nuclear@0: #define BGXCNT_SCRSIZE(x) ((x) << 14) nuclear@0: #define BGXCNT_TX_256X256 BGXCNT_SCRSIZE(0) nuclear@0: #define BGXCNT_TX_512X256 BGXCNT_SCRSIZE(1) nuclear@0: #define BGXCNT_TX_256X512 BGXCNT_SCRSIZE(2) nuclear@0: #define BGXCNT_TX_512X512 BGXCNT_SCRSIZE(3) nuclear@0: #define BGXCNT_RS_128X128 BGXCNT_SCRSIZE(0) nuclear@0: #define BGXCNT_RS_256X256 BGXCNT_SCRSIZE(1) nuclear@0: #define BGXCNT_RS_512X512 BGXCNT_SCRSIZE(2) nuclear@0: #define BGXCNT_RS_1024X1024 BGXCNT_SCRSIZE(3) nuclear@0: #define BGXCNT_BM_128X128 (BGXCNT_SCRSIZE(0) | BGXCNT_BM) nuclear@0: #define BGXCNT_BM_256X256 (BGXCNT_SCRSIZE(1) | BGXCNT_BM) nuclear@0: #define BGXCNT_BM_512X256 (BGXCNT_SCRSIZE(2) | BGXCNT_BM) nuclear@0: #define BGXCNT_BM_512X512 (BGXCNT_SCRSIZE(3) | BGXCNT_BM) nuclear@0: #define BGXCNT_BM8 0 nuclear@0: #define BGXCNT_BM16 0x0004 nuclear@0: nuclear@0: #define VRAM_OFFSET(x) ((x) << 3) nuclear@0: #define VRAM_ENABLE 0x80 nuclear@0: nuclear@0: /* ---- DMA registers ---- */ nuclear@0: #define REG_DMA0SAD REG32(0xb0) nuclear@0: #define REG_DMA0DAD REG32(0xb4) nuclear@0: #define REG_DMA0CNT_L REG16(0xb8) nuclear@0: #define REG_DMA0CNT_H REG16(0xba) nuclear@0: #define REG_DMA1SAD REG32(0xbc) nuclear@0: #define REG_DMA1DAD REG32(0xc0) nuclear@0: #define REG_DMA1CNT_L REG16(0xc4) nuclear@0: #define REG_DMA1CNT_H REG16(0xc6) nuclear@0: #define REG_DMA2SAD REG32(0xc8) nuclear@0: #define REG_DMA2DAD REG32(0xcc) nuclear@0: #define REG_DMA2CNT_L REG16(0xd0) nuclear@0: #define REG_DMA2CNT_H REG16(0xd2) nuclear@0: #define REG_DMA3SAD REG32(0xd4) nuclear@0: #define REG_DMA3DAD REG32(0xd8) nuclear@0: #define REG_DMA3CNT_L REG16(0xdc) nuclear@0: #define REG_DMA3CNT_H REG16(0xde) nuclear@0: #define REG_DMA0FILL REG32(0xe0) nuclear@0: #define REG_DMA1FILL REG32(0xe4) nuclear@0: #define REG_DMA2FILL REG32(0xe8) nuclear@0: #define REG_DMA3FILL REG32(0xec) nuclear@0: nuclear@0: /* ---- timer registers ---- */ nuclear@0: #define REG_TM0CNT_L REG16(0x100) nuclear@0: #define REG_TM0CNT_H REG16(0x102) nuclear@0: #define REG_TM1CNT_L REG16(0x104) nuclear@0: #define REG_TM1CNT_H REG16(0x106) nuclear@0: #define REG_TM2CNT_L REG16(0x108) nuclear@0: #define REG_TM2CNT_H REG16(0x10a) nuclear@0: #define REG_TM3CNT_L REG16(0x10c) nuclear@0: #define REG_TM3CNT_H REG16(0x10e) nuclear@0: nuclear@0: /* ---- keypad registers ---- */ nuclear@0: #define REG_KEYINPUT REG16(0x130) nuclear@0: #define REG_KEYCNT REG16(0x132) nuclear@0: nuclear@0: /* ---- IPC/ROM registers ---- */ nuclear@0: #define REG_IPCSYNC REG16(0x180) nuclear@0: #define REG_IPCFIFOCNT REG16(0x184) nuclear@0: #define REG_IPCFIFOSEND REG32(0x188) nuclear@0: #define REG_AUXSPICNT REG16(0x1a0) nuclear@0: #define REG_AUXSPIDATA REG16(0x1a2) nuclear@0: #define REG_GCARDCNT REG32(0x1a4) nuclear@0: #define REG_GCARDCMD64 REG64(0x1a8) nuclear@0: #define REG_GCARDSEED0 REG32(0x1b0) nuclear@0: #define REG_GCARDSEED1 REG32(0x1b4) nuclear@0: #define REG_GCARDSEED0X REG16(0x1b8) nuclear@0: #define REG_GCARDSEED1X REG16(0x1ba) nuclear@0: nuclear@0: /* ---- memory & IRQ control registers ---- */ nuclear@0: #define REG_EXMEMCNT REG16(0x204) nuclear@0: #define REG_IME REG16(0x208) nuclear@0: #define REG_IE REG32(0x210) nuclear@0: #define REG_IF REG32(0x214) nuclear@0: #define REG_VRAMCNT_A REG8(0x240) nuclear@0: #define REG_VRAMCNT_B REG8(0x241) nuclear@0: #define REG_VRAMCNT_C REG8(0x242) nuclear@0: #define REG_VRAMCNT_D REG8(0x243) nuclear@0: #define REG_VRAMCNT_E REG8(0x244) nuclear@0: #define REG_VRAMCNT_F REG8(0x245) nuclear@0: #define REG_VRAMCNT_G REG8(0x246) nuclear@0: #define REG_WRAMCNT REG8(0x247) nuclear@0: #define REG_VRAMCNT_H REG8(0x248) nuclear@0: #define REG_VRAMCNT_I REG8(0x249) nuclear@0: nuclear@0: /* ---- math hardware registers ---- */ nuclear@0: #define REG_DIVCNT REG16(0x280) nuclear@0: #define REG_DIV_NUMER REG64(0x290) nuclear@0: #define REG_DIV_DENOM REG64(0x298) nuclear@0: #define REG_DIV_RESULT REG64(0x2a0) nuclear@0: #define REG_DIVREM_RESULT REG64(0x2a8) nuclear@0: #define REG_SQRTCNT REG16(0x2b0) nuclear@0: #define REG_SQRT_RESULT REG32(0x2b4) nuclear@0: #define REG_SQRT_PARAM REG64(0x2b8) nuclear@0: #define REG_POSTFLG REG32(0x300) nuclear@0: #define REG_POWCNT1 REG16(0x304) nuclear@0: #define REG_POWCNT2 REG16(0x304) nuclear@0: nuclear@0: #define POWCNT1_LCD 0x0001 nuclear@0: #define POWCNT1_2DA 0x0002 nuclear@0: #define POWCNT1_3DREND 0x0004 nuclear@0: #define POWCNT1_3DGEOM 0x0008 nuclear@0: #define POWCNT1_2DB 0x0200 nuclear@0: #define POWCNT1_DSWAP 0x8000 nuclear@0: nuclear@0: #define POWCNT2_SOUND 0x0001 nuclear@0: #define POWCNT2_WIFI 0x0002 nuclear@0: nuclear@0: /* ---- sound registers ---- */ nuclear@0: #define REG_SOUNDXCNT(x) REG32(0x400 | ((x) << 4)) nuclear@0: #define REG_SOUNDXSAD(x) REG32(0x404 | ((x) << 4)) nuclear@0: #define REG_SOUNDXTMR(x) REG32(0x408 | ((x) << 4)) nuclear@0: #define REG_SOUNDXPNT(x) REG32(0x40a | ((x) << 4)) nuclear@0: #define REG_SOUNDXLEN(x) REG32(0x40c | ((x) << 4)) nuclear@0: #define REG_SOUNDCNT REG32(0x500) nuclear@0: #define REG_SOUNDBIAS REG32(0x504) nuclear@0: nuclear@0: /* ---- 3D hardware registers ---- */ nuclear@0: /* rendering engine */ nuclear@0: #define REG_RDLINES_COUNR REG8(0x320) nuclear@0: #define REG_EDGE_COLOR0 REG16(0x330) nuclear@0: #define REG_EDGE_COLOR1 REG16(0x332) nuclear@0: #define REG_EDGE_COLOR2 REG16(0x334) nuclear@0: #define REG_EDGE_COLOR3 REG16(0x336) nuclear@0: #define REG_EDGE_COLOR4 REG16(0x338) nuclear@0: #define REG_EDGE_COLOR5 REG16(0x33a) nuclear@0: #define REG_EDGE_COLOR6 REG16(0x33c) nuclear@0: #define REG_EDGE_COLOR7 REG16(0x33e) nuclear@0: #define REG_ALPHA_TEST_REF REG8(0x340) nuclear@0: #define REG_CLEAR_COLOR REG32(0x350) nuclear@0: #define REG_CLEAR_DEPTH REG16(0x354) nuclear@0: #define REG_CLRIMAGE_OFFSET REG16(0x356) nuclear@0: #define REG_FOG_COLOR REG32(0x358) nuclear@0: #define REG_FOG_OFFSET REG16(0x35c) nuclear@0: #define FOG_TABLE_ADDR ((uint8_t*)(REG_BASE + 0x360)) nuclear@0: #define TOON_TABLE_ADDR ((uint16_t*)(REG_BASE + 0x380)) nuclear@0: /* geometry engine */ nuclear@0: #define GXFIFO_ADDR ((uint8_t*)(REG_BASE + 0x400)) nuclear@0: #define REG_GXSTAT REG32(0x600) nuclear@0: #define REG_RAM_COUNT REG32(0x604) nuclear@0: #define REG_DISP_1DOT_DEPTH REG16(0x610) nuclear@0: #define POS_RESULT_ADDR ((uint8_t*)(REG_BASE + 0x620)) nuclear@0: #define VEC_RESULT_ADDR ((uint8_t*)(REG_BASE + 0x630)) nuclear@0: #define CLIPMTX_RESULT_ADDR ((uint32_t*)(REG_BASE + 0x640)) nuclear@0: #define VECMTX_RESULT_ADDR ((uint32_t*)(REG_BASE + 0x680)) nuclear@0: /* geometry command ports */ nuclear@0: #define REG_MTX_MODE REG32(0x440) /* 1 */ nuclear@0: #define REG_MTX_PUSH REG32(0x444) /* 0 */ nuclear@0: #define REG_MTX_POP REG32(0x448) /* 1 */ nuclear@0: #define REG_MTX_STORE REG32(0x44c) /* 1 */ nuclear@0: #define REG_MTX_RESTORE REG32(0x450) /* 1 */ nuclear@0: #define REG_MTX_IDENTITY REG32(0x454) /* 0 */ nuclear@0: #define REG_MTX_LOAD_4X4 REG32(0x458) /* 16 */ nuclear@0: #define REG_MTX_LOAD_4X3 REG32(0x45c) /* 12 */ nuclear@0: #define REG_MTX_MULT_4X4 REG32(0x460) /* 16 */ nuclear@0: #define REG_MTX_MULT_4X3 REG32(0x464) /* 12 */ nuclear@0: #define REG_MTX_MULT_3X3 REG32(0x468) /* 9 */ nuclear@0: #define REG_MTX_SCALE REG32(0x46c) /* 3 */ nuclear@0: #define REG_MTX_TRANS REG32(0x470) /* 3 */ nuclear@0: #define REG_COLOR REG32(0x480) /* 1 */ nuclear@0: #define REG_NORMAL REG32(0x484) /* 1 */ nuclear@0: #define REG_TEXCOORD REG32(0x488) /* 1 */ nuclear@0: #define REG_VTX_16 REG32(0x48c) /* 2 */ nuclear@0: #define REG_VTX_10 REG32(0x490) /* 1 */ nuclear@0: #define REG_VTX_XY REG32(0x494) /* 1 */ nuclear@0: #define REG_VTX_XZ REG32(0x498) /* 1 */ nuclear@0: #define REG_VTX_YZ REG32(0x49c) /* 1 */ nuclear@0: #define REG_VTX_DIFF REG32(0x4a0) /* 1 */ nuclear@0: #define REG_POLYGON_ATTR REG32(0x4a4) /* 1 */ nuclear@0: #define REG_TEXIMAGE_PARAM REG32(0x4a8) /* 1 */ nuclear@0: #define REG_PLTT_BASE REG32(0x4ac) /* 1 */ nuclear@0: #define REG_DIF_AMB REG32(0x4c0) /* 1 */ nuclear@0: #define REG_SPE_EMI REG32(0x4c4) /* 1 */ nuclear@0: #define REG_LIGHT_VECTOR REG32(0x4c8) /* 1 */ nuclear@0: #define REG_LIGHT_COLOR REG32(0x4cc) /* 1 */ nuclear@0: #define REG_SHININESS REG32(0x4d0) /* 32 */ nuclear@0: #define REG_BEGIN_VTXS REG32(0x500) /* 1 */ nuclear@0: #define REG_END_VTXS REG32(0x504) /* 0 */ nuclear@0: #define REG_SWAP_BUFFERS REG32(0x540) /* 1 */ nuclear@0: #define REG_VIEWPORT REG32(0x580) /* 1 */ nuclear@0: #define REG_BOX_TEST REG32(0x5c0) /* 3 */ nuclear@0: #define REG_POS_TEST REG32(0x5c4) /* 2 */ nuclear@0: #define REG_VEC_TEST REG32(0x5c8) /* 1 */ nuclear@0: nuclear@0: /* geometry commands */ nuclear@0: #define GCMD_MTX_MODE 0x10 /* 1 */ nuclear@0: #define GCMD_MTX_PUSH 0x11 /* 0 */ nuclear@0: #define GCMD_MTX_POP 0x12 /* 1 */ nuclear@0: #define GCMD_MTX_STORE 0x13 /* 1 */ nuclear@0: #define GCMD_MTX_RESTORE 0x14 /* 1 */ nuclear@0: #define GCMD_MTX_IDENTITY 0x15 /* 0 */ nuclear@0: #define GCMD_MTX_LOAD_4X4 0x16 /* 16 */ nuclear@0: #define GCMD_MTX_LOAD_4X3 0x17 /* 12 */ nuclear@0: #define GCMD_MTX_MULT_4X4 0x18 /* 16 */ nuclear@0: #define GCMD_MTX_MULT_4X3 0x19 /* 12 */ nuclear@0: #define GCMD_MTX_MULT_3X3 0x1a /* 9 */ nuclear@0: #define GCMD_MTX_SCALE 0x1b /* 3 */ nuclear@0: #define GCMD_MTX_TRANS 0x1c /* 3 */ nuclear@0: #define GCMD_COLOR 0x20 /* 1 */ nuclear@0: #define GCMD_NORMAL 0x21 /* 1 */ nuclear@0: #define GCMD_TEXCOORD 0x22 /* 1 */ nuclear@0: #define GCMD_VTX_16 0x23 /* 2 */ nuclear@0: #define GCMD_VTX_10 0x24 /* 1 */ nuclear@0: #define GCMD_VTX_XY 0x25 /* 1 */ nuclear@0: #define GCMD_VTX_XZ 0x26 /* 1 */ nuclear@0: #define GCMD_VTX_YZ 0x27 /* 1 */ nuclear@0: #define GCMD_VTX_DIFF 0x28 /* 1 */ nuclear@0: #define GCMD_POLYGON_ATTR 0x29 /* 1 */ nuclear@0: #define GCMD_TEXIMAGE_PARAM 0x2a /* 1 */ nuclear@0: #define GCMD_PLTT_BASE 0x2b /* 1 */ nuclear@0: #define GCMD_DIF_AMB 0x30 /* 1 */ nuclear@0: #define GCMD_SPE_EMI 0x31 /* 1 */ nuclear@0: #define GCMD_LIGHT_VECTOR 0x32 /* 1 */ nuclear@0: #define GCMD_LIGHT_COLOR 0x33 /* 1 */ nuclear@0: #define GCMD_SHININESS 0x34 /* 32 */ nuclear@0: #define GCMD_BEGIN_VTXS 0x40 /* 1 */ nuclear@0: #define GCMD_END_VTXS 0x41 /* 0 */ nuclear@0: #define GCMD_SWAP_BUFFERS 0x50 /* 1 */ nuclear@0: #define GCMD_VIEWPORT 0x60 /* 1 */ nuclear@0: #define GCMD_BOX_TEST 0x70 /* 3 */ nuclear@0: #define GCMD_POS_TEST 0x71 /* 2 */ nuclear@0: #define GCMD_VEC_TEST 0x72 /* 1 */ nuclear@0: nuclear@0: /* addresses of interest */ nuclear@0: #define SHARED_WRAM_PTR ((void*)0x3000000) nuclear@0: #define VRAM_BGA_PTR ((void*)0x6000000) nuclear@0: #define VRAM_BGB_PTR ((void*)0x6200000) nuclear@0: #define VRAM_OBJA_PTR ((void*)0x6400000) nuclear@0: #define VRAM_OBJB_PTR ((void*)0x6600000) nuclear@0: #define VRAM_LCDC_PTR ((void*)0x6800000) nuclear@0: #define OAM_PTR ((void*)0x7000000) nuclear@0: nuclear@0: #endif /* DSREGS_H_ */