1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/src/startup.s	Tue Mar 14 05:59:33 2017 +0200
     1.3 @@ -0,0 +1,47 @@
     1.4 +	.text
     1.5 +	.extern main
     1.6 +
     1.7 +	.global start
     1.8 +	.global halt_cpu
     1.9 +start:
    1.10 +	bsr.s disable_intr
    1.11 +
    1.12 +	| copy .data section from ROM to RAM
    1.13 +	move.l #_data_lma, %a0
    1.14 +	move.l #_data_start, %a1
    1.15 +	move.l #_data_end, %a2
    1.16 +	cmp.l %a1, %a2
    1.17 +	beq.s 1f	| skip data copy if the section is empty
    1.18 +0:	move.l (%a0)+, (%a1)+
    1.19 +	cmp.l %a1, %a2
    1.20 +	bne.s 0b
    1.21 +1:
    1.22 +
    1.23 +	| zero the .bss section
    1.24 +	move.l #_bss_start, %a0
    1.25 +	move.l #_bss_end, %a1
    1.26 +	cmp.l %a0, %a1
    1.27 +	beq.s 1f	| skip bss zeroing if the section is empty
    1.28 +0:	clr.l (%a0)+
    1.29 +	cmp.l %a0, %a1
    1.30 +	bne.s 0b
    1.31 +1:
    1.32 +
    1.33 +	| setup the stack pointer stack
    1.34 +	move.l #_stacktop, %sp
    1.35 +	| now that we have a stack, we can enable interrupts
    1.36 +	bsr.s enable_intr
    1.37 +
    1.38 +	jsr main
    1.39 +halt_cpu:
    1.40 +	stop #0x2700
    1.41 +
    1.42 +.global enable_intr
    1.43 +enable_intr:
    1.44 +	andi.w #0xf8ff, %sr
    1.45 +	rts
    1.46 +
    1.47 +.global disable_intr
    1.48 +disable_intr:
    1.49 +	ori.w #0x0300, %sr
    1.50 +	rts