1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/src/intr.s	Tue Mar 14 05:59:33 2017 +0200
     1.3 @@ -0,0 +1,82 @@
     1.4 +| the following will go into the .vect section which will be placed at the very
     1.5 +| begining of the binary at address 0 by the linker (see lnkscript).
     1.6 +	.section .vect,"a"
     1.7 +	.extern start
     1.8 +| exception vectors
     1.9 +	.long _stacktop		| 00 reset - initial SSP
    1.10 +	.long start		| 01 reset - initial PC
    1.11 +	.long intr_fatal	| 02 bus error
    1.12 +	.long intr_fatal	| 03 address error
    1.13 +	.long intr_fatal	| 04 illegal instruction
    1.14 +	.long intr_fatal	| 05 zero divide
    1.15 +	.long intr_fatal	| 06 chk instruction
    1.16 +	.long intr_fatal	| 07 trapv instruction
    1.17 +	.long intr_fatal	| 08 privilege violation
    1.18 +	.long intr_fatal	| 09 trace
    1.19 +	.long intr_fatal	| 0a line 1010 emulator
    1.20 +	.long intr_fatal	| 0b line 1111 emulator
    1.21 +	.long intr_fatal	| 0c reserved
    1.22 +	.long intr_fatal	| 0d reserved
    1.23 +	.long intr_fatal	| 0e format error (mc68010 only)
    1.24 +	.long intr_fatal	| 0f uninitialized interrupt vector
    1.25 +	.long intr_fatal	| 10 \
    1.26 +	.long intr_fatal	| 11 |
    1.27 +	.long intr_fatal	| 12 |
    1.28 +	.long intr_fatal	| 13  > reserved
    1.29 +	.long intr_fatal	| 14 |
    1.30 +	.long intr_fatal	| 15 |
    1.31 +	.long intr_fatal	| 16 |
    1.32 +	.long intr_fatal	| 17 /
    1.33 +	.long intr_fatal	| 18 spurious interrupt 
    1.34 +	.long intr_fatal	| 19 level 1 interrupt
    1.35 +	.long intr_fatal	| 1a level 2 interrupt
    1.36 +	.long intr_fatal	| 1b level 3 interrupt
    1.37 +	.long intr_hblank	| 1c level 4 interrupt (hblank in the mega drive)
    1.38 +	.long intr_fatal	| 1d level 5 interrupt
    1.39 +	.long intr_vblank	| 1e level 6 interrupt (vblank in the mega drive)
    1.40 +	.long intr_fatal	| 1f level 7 interrupt
    1.41 +	.long intr_fatal	| 20 trap 0
    1.42 +	.long intr_fatal	| 21 trap 1
    1.43 +	.long intr_fatal	| 22 trap 2
    1.44 +	.long intr_fatal	| 23 trap 3
    1.45 +	.long intr_fatal	| 24 trap 4
    1.46 +	.long intr_fatal	| 25 trap 5
    1.47 +	.long intr_fatal	| 26 trap 6
    1.48 +	.long intr_fatal	| 27 trap 7
    1.49 +	.long intr_fatal	| 28 trap 8
    1.50 +	.long intr_fatal	| 29 trap 9
    1.51 +	.long intr_fatal	| 2a trap a
    1.52 +	.long intr_fatal	| 2b trap b
    1.53 +	.long intr_fatal	| 2c trap c
    1.54 +	.long intr_fatal	| 2d trap d
    1.55 +	.long intr_fatal	| 2e trap e
    1.56 +	.long intr_fatal	| 2f trap f
    1.57 +	.long intr_fatal	| 30 \
    1.58 +	.long intr_fatal	| 31 |
    1.59 +	.long intr_fatal	| 32 |
    1.60 +	.long intr_fatal	| 33 |
    1.61 +	.long intr_fatal	| 34 |
    1.62 +	.long intr_fatal	| 35 |
    1.63 +	.long intr_fatal	| 36 |
    1.64 +	.long intr_fatal	| 37 |
    1.65 +	.long intr_fatal	| 38  > reserved
    1.66 +	.long intr_fatal	| 39 |
    1.67 +	.long intr_fatal	| 3a |
    1.68 +	.long intr_fatal	| 3b |
    1.69 +	.long intr_fatal	| 3c |
    1.70 +	.long intr_fatal	| 3d |
    1.71 +	.long intr_fatal	| 3e |
    1.72 +	.long intr_fatal	| 3f /
    1.73 +
    1.74 +| from here on we continue in the regular .text section since we don't care
    1.75 +| where this code ends up.
    1.76 +	.text
    1.77 +| interrupt handlers
    1.78 +intr_fatal:
    1.79 +	stop #0x2700
    1.80 +
    1.81 +| TODO hblank/vblank code
    1.82 +intr_hblank:
    1.83 +	rte
    1.84 +intr_vblank:
    1.85 +	rte