1.1 --- a/src/intr.s	Tue Mar 14 05:59:33 2017 +0200
     1.2 +++ b/src/intr.s	Tue Mar 14 09:02:43 2017 +0200
     1.3 @@ -71,12 +71,36 @@
     1.4  | from here on we continue in the regular .text section since we don't care
     1.5  | where this code ends up.
     1.6  	.text
     1.7 +
     1.8 +.global enable_intr
     1.9 +enable_intr:
    1.10 +	andi.w #0xf8ff, %sr
    1.11 +	rts
    1.12 +
    1.13 +.global disable_intr
    1.14 +disable_intr:
    1.15 +	ori.w #0x0300, %sr
    1.16 +	rts
    1.17 +
    1.18  | interrupt handlers
    1.19  intr_fatal:
    1.20  	stop #0x2700
    1.21  
    1.22 -| TODO hblank/vblank code
    1.23 +	.include "vdpdefs.inc"
    1.24 +	.extern hblank_handler
    1.25 +	.extern vblank_handler
    1.26 +	.extern palval
    1.27 +
    1.28  intr_hblank:
    1.29 +	move.l #0xc0020000, VDP_PORT_CTL
    1.30 +
    1.31 +	move.w testcol, %d0
    1.32 +	move.w %d0, VDP_PORT_DATA
    1.33 +	rol.b #4, %d0
    1.34 +	move.w %d0, testcol
    1.35 +
    1.36  	rte
    1.37 +
    1.38  intr_vblank:
    1.39 +	jsr vblank_handler
    1.40  	rte