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1 #ifndef VDP_H_
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2 #define VDP_H_
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3
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4 #include <stdint.h>
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5
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6 #define VDP_PORT_DATA *((volatile uint16_t*)0xc00000)
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7 #define VDP_PORT_DATA32 *((volatile uint32_t*)0xc00000)
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8 #define VDP_PORT_CTL *((volatile uint16_t*)0xc00004)
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9 #define VDP_PORT_CTL32 *((volatile uint32_t*)0xc00004)
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10 #define VDP_PORT_HVCNT *((volatile uint16_t*)0xc00008)
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11 #define VDP_PORT_PSG *((volatile uint16_t*)0xc00010)
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12
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13 #define VDP_PORT_STATUS *((volatile uint16_t*)0xc00004)
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14
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15 enum {
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16 VDP_REG_MODE1 = 0,
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17 VDP_REG_MODE2 = 1,
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18 VDP_REG_NAMETAB_A = 2,
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19 VDP_REG_NAMETAB_WIN = 3,
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20 VDP_REG_NAMETAB_B = 4,
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21 VDP_REG_SPRITE_TAB = 5,
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22 VDP_REG_BGCOL = 7,
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23 VDP_REG_HINTR = 10,
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24 VDP_REG_MODE3 = 11,
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25 VDP_REG_MODE4 = 12,
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26 VDP_REG_SCROLL_TAB = 13,
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27 VDP_REG_AUTOINC = 15,
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28 VDP_REG_SCROLL_SIZE = 16,
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29 VDP_REG_WIN_XPOS = 17,
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30 VDP_REG_WIN_YPOS = 18,
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31 VDP_REG_DMA_LEN_LOW = 19,
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32 VDP_REG_DMA_LEN_HIGH = 20,
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33 VDP_REG_DMA_SRC_LOW = 21,
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34 VDP_REG_DMA_SRC_MID = 22,
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35 VDP_REG_DMA_SRC_HIGH = 23,
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36
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37 VDP_NUM_REGS
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38 };
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39
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40 uint16_t vdp_reg_shadow[VDP_NUM_REGS];
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41
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42 /* access VDP memory */
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43 enum { VDP_MEM_READ, VDP_MEM_WRITE };
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44 enum {
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45 VDP_MEM_VRAM = 0,
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46 VDP_MEM_CRAM = 0xa, /* CD5->CD0: 0 0 r 0 w 0 */
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47 VDP_MEM_VSRAM = 4 /* CD5->CD0: 0 0 0 1 0 0 */
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48 };
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49
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50 enum {
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51 VDP_PLANE_A,
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52 VDP_PLANE_B,
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53 VDP_PLANE_WIN
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54 };
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55
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56 enum {
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57 VDP_TILE_LOW_PRIO = 0,
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58 VDP_TILE_HFLIP = 0x0800,
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59 VDP_TILE_VFLIP = 0x1000,
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60 VDP_TILE_HIGH_PRIO = 0x8000
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61 };
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62
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63 static inline void vdp_setup_access(uint16_t addr, int rw, int memid)
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64 {
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65 uint32_t type;
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66 if(rw == VDP_MEM_WRITE) {
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67 type = (memid & 7) | 1;
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68 } else {
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69 type = memid & 0xc;
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70 }
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71
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72 VDP_PORT_CTL32 = (((uint32_t)addr & 0x3fff) << 16) | ((addr >> 14) & 3) |
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73 ((type << 2) & 0xf0) | (type << 30);
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74 }
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75
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76
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77 /* mode register 1 */
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78 enum {
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79 VDP_MODE1_BASE = 0x4,
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80 VDP_MODE1_HVCNT = 0x2,
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81 VDP_MODE1_HINTR = 0x10
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82 };
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83
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84 /* mode register 2 */
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85 enum {
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86 VDP_MODE2_BASE = 0x4,
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87 VDP_MODE2_V30CELL = 0x8,
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88 VDP_MODE2_DMA = 0x10,
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89 VDP_MODE2_VINTR = 0x20,
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90 VDP_MODE2_DISP = 0x40
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91 };
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92
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93 /* mode register 3 */
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94 enum {
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95 VDP_MODE3_BASE = 0,
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96 VDP_MODE3_HSCROLL_CELL = 2,
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97 VDP_MODE3_HSCROLL_LINE = 3,
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98 VDP_MODE3_VSCROLL_2CELL = 4,
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99 VDP_MODE3_EXTINTR = 8
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100 };
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101
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102 /* mode register 4 */
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103 enum {
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104 VDP_MODE4_BASE = 0,
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105 VDP_MODE4_H40CELL = 0x81,
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106 VDP_MODE4_ILACE = 2,
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107 VDP_MODE4_ILACE_2XRES = 6,
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108 VDP_MODE4_SH = 8 /* shadow/highlight enable */
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109 };
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110
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111 /* scroll size register */
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112 enum {
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113 VDP_SCROLL_H32 = 0,
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114 VDP_SCROLL_H64 = 1,
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115 VDP_SCROLL_H128 = 3,
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116 VDP_SCROLL_V32 = 0,
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117 VDP_SCROLL_V64 = 0x10,
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118 VDP_SCROLL_V128 = 0x30
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119 };
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120
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121 /* window X/Y position register */
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122 enum {
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123 VDP_WIN_LEFT = 0,
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124 VDP_WIN_UP = 0,
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125 VDP_WIN_RIGHT = 0x80,
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126 VDP_WIN_DOWN = 0x80,
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127 VDP_WIN_POSMASK = 0x1f
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128 };
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129
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130 #define VDP_PACK_RGB(r, g, b) \
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131 ((((uint16_t)(r) & 7) << 1) | (((uint16_t)(g) & 7) << 5) | (((uint16_t)(b) & 7) << 9))
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132
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133
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134 static inline void vdp_setreg(int reg, uint8_t value)
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135 {
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136 vdp_reg_shadow[reg] = value;
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137 VDP_PORT_CTL = (uint16_t)value | (reg << 8) | (uint16_t)0x8000;
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138 }
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139
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140 static inline uint16_t vdp_getreg(int reg)
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141 {
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142 return vdp_reg_shadow[reg];
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143 }
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144
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145 static inline uint16_t vdp_status(void)
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146 {
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147 return VDP_PORT_CTL;
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148 }
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149
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150 static inline void vdp_set_bgcolor(int palidx, int colidx)
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151 {
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152 vdp_setreg(VDP_REG_BGCOL, (colidx & 0xf) | (palidx << 4));
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153 }
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154
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155 static inline void vdp_set_autoinc(int stride)
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156 {
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157 vdp_setreg(VDP_REG_AUTOINC, stride);
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158 }
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159
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160 static inline void vdp_begin_palette(int pidx, int cidx)
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161 {
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162 uint16_t paddr = (pidx << 5) | (cidx << 1);
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163 vdp_setup_access(paddr, VDP_MEM_WRITE, VDP_MEM_CRAM);
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164 }
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165
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166 static inline void vdp_set_pal_entry(int pidx, int cidx, int r, int g, int b)
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167 {
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168 vdp_begin_palette(pidx, cidx);
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169 VDP_PORT_DATA = VDP_PACK_RGB(r, g, b);
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170 }
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171
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172 static inline void vdp_enable_vintr(void)
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173 {
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174 vdp_setreg(VDP_REG_MODE2, vdp_getreg(VDP_REG_MODE2) | VDP_MODE2_VINTR);
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175 }
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176
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177 static inline void vdp_disable_vintr(void)
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178 {
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179 vdp_setreg(VDP_REG_MODE2, vdp_getreg(VDP_REG_MODE2) & ~VDP_MODE2_VINTR);
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180 }
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181
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182 static inline void vdp_enable_hintr(int counter)
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183 {
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184 vdp_setreg(VDP_REG_HINTR, counter);
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185 vdp_setreg(VDP_REG_MODE1, vdp_getreg(VDP_REG_MODE1) | VDP_MODE1_HINTR);
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186 }
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187
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188 static inline void vdp_disable_hintr(void)
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189 {
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190 vdp_setreg(VDP_REG_MODE1, vdp_getreg(VDP_REG_MODE1) & ~VDP_MODE1_HINTR);
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191 }
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192
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193 static inline void vdp_set_nametab_addr(int plane, uint16_t addr)
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194 {
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195 switch(plane) {
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196 case VDP_PLANE_A:
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197 vdp_setreg(VDP_REG_NAMETAB_A, (addr >> 10) & 0x38);
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198 break;
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199 case VDP_PLANE_B:
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200 vdp_setreg(VDP_REG_NAMETAB_B, (addr >> 13) & 7);
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201 break;
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202 case VDP_PLANE_WIN:
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203 vdp_setreg(VDP_REG_NAMETAB_WIN, (addr >> 10) & 0x7e);
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204 default:
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205 break;
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206 }
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207 }
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208
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209 static inline uint16_t vdp_nametab_addr(int idx)
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210 {
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211 return (uint16_t)idx << 13;
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212 }
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213
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214 static inline void vdp_set_nametab_idx(int plane, int idx)
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215 {
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216 vdp_set_nametab_addr(plane, vdp_nametab_addr(idx));
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217 }
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218
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219 static inline void vdp_disable_layer(int plane)
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220 {
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221 switch(plane) {
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222 case VDP_PLANE_A:
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223 vdp_setreg(VDP_REG_NAMETAB_A, 0x40);
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224 break;
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225 case VDP_PLANE_B:
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226 vdp_setreg(VDP_REG_NAMETAB_B, 0x08);
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227 break;
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228 case VDP_PLANE_WIN:
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229 vdp_setreg(VDP_REG_NAMETAB_WIN, 0x40);
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230 default:
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231 break;
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232 }
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233 }
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234
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235 static inline uint16_t vdp_nametab_entry(int tileidx, int palidx, uint16_t flags)
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236 {
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237 return tileidx | (((uint16_t)palidx & 0x3) << 13) | flags;
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238 }
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239
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240 static inline void vdp_set_sprite_table(uint16_t addr)
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241 {
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242 vdp_setreg(VDP_REG_SPRITE_TAB, addr >> 9);
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243 }
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244
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245 static inline void vdp_set_scroll_table(uint16_t addr)
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246 {
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247 vdp_setreg(VDP_REG_SCROLL_TAB, addr >> 10);
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248 }
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249
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250 void vdp_init(void);
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251
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252 #endif /* VDP_H_ */
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