# HG changeset patch
# User John Tsiombikas <nuclear@member.fsf.org>
# Date 1487505626 -7200
# Node ID 8253942b0a1af0e8ff4e92c6437f6912314a7624
# Parent  862f8a034caeec49a98fc9f350eb04f6948733d5
in the middle of something

diff -r 862f8a034cae -r 8253942b0a1a src/main.c
--- a/src/main.c	Sat Feb 11 08:56:42 2017 +0200
+++ b/src/main.c	Sun Feb 19 14:00:26 2017 +0200
@@ -17,7 +17,7 @@
 
 int main(void)
 {
-	unsigned char *tmap;
+	uint16_t *tmap;
 
 	vdp_init();
 
@@ -28,5 +28,6 @@
 	tmap = vdp_tilemap_ptr(VDP_PLANE_A);
 
 
+
 	return 0;
 }
diff -r 862f8a034cae -r 8253942b0a1a src/startup.s
--- a/src/startup.s	Sat Feb 11 08:56:42 2017 +0200
+++ b/src/startup.s	Sun Feb 19 14:00:26 2017 +0200
@@ -4,6 +4,9 @@
 	.global start
 	.global halt_cpu
 start:
+	| copy the string 'SEGA' to appease the TMSS
+	move.l 100, 0xa14000 | SEGA is always at address 100
+
 	| copy .data section from ROM to RAM
 	move.l #_data_lma, %a0
 	move.l #_data_start, %a1
@@ -24,6 +27,10 @@
 	cmp.l %a0, %a1
 	bne.s 0b
 1:
+
+	| setup the stack pointer stack
+	move.l #_stacktop, %sp
+
 	jsr main
 halt_cpu:
 	stop #0x2700
diff -r 862f8a034cae -r 8253942b0a1a src/vdp.c
--- a/src/vdp.c	Sat Feb 11 08:56:42 2017 +0200
+++ b/src/vdp.c	Sun Feb 19 14:00:26 2017 +0200
@@ -3,18 +3,20 @@
 #include "io.h"
 #include "misc.h"
 
-static void *tilemap_ptr[3];
+unsigned char vdp_shadow_reg[24];
+
+static uint32_t tilemap_addr[3];
 
 int vdp_init(void)
 {
-	unsigned int mode1_flags = VDP_REG1_DISP_BIT;
+	unsigned int mode1_flags = VDP_MSET2_DISP_BIT;
 
 	if(mdg_ispal()) {
-		mode1_flags |= VDP_REG1_30CELL_BIT;
+		mode1_flags |= VDP_MSET2_30CELL_BIT;
 	}
 
-	VDP_SET_REG(0, VDP_REG0_BASE);
-	VDP_SET_REG(1, VDP_REG1_BASE | mode1_flags);
+	VDP_SET_REG(VDP_REG_MSET1, VDP_MSET1_BASE);
+	VDP_SET_REG(VDP_REG_MSET2, VDP_MSET2_BASE | mode1_flags);
 
 	return 0;
 }
@@ -24,24 +26,24 @@
 	switch(plane) {
 	case VDP_PLANE_A:
 		VDP_SET_REG(VDP_REG_PADDR_A, (slot & 7) << 3);
-		tilemap_ptr[VDP_PLANE_A] = (void*)((uint32_t)slot << 13);
+		tilemap_addr[VDP_PLANE_A] = ((uint32_t)slot << 13);
 		break;
 
 	case VDP_PLANE_WIN:
 		VDP_SET_REG(VDP_REG_PADDR_WIN, (slot & 0x1f) << 1);
-		tilemap_ptr[VDP_PLANE_WIN] = (void*)((uint32_t)slot << 11);
+		tilemap_addr[VDP_PLANE_WIN] = ((uint32_t)slot << 11);
 		break;
 
 	case VDP_PLANE_B:
 		VDP_SET_REG(VDP_REG_PADDR_B, slot & 7);
-		tilemap_ptr[VDP_PLANE_B] = (void*)((uint32_t)slot << 13);
+		tilemap_addr[VDP_PLANE_B] = ((uint32_t)slot << 13);
 		break;
 	}
 }
 
-void *vdp_tilemap_ptr(int plane)
+uint32_t vdp_tilemap_addr(int plane)
 {
-	return tilemap_ptr[plane];
+	return tilemap_addr[plane];
 }
 
 void vdp_setpal_rgb24(int idx, int r, int g, int b)
@@ -83,3 +85,19 @@
 
 	VDP_SET_REG(VDP_REG_SCROLL_SIZE, (ytiles << 4) | xtiles);
 }
+
+void vdp_memcpy(uint32_t vaddr, void *src, int sz)
+{
+	uint32_t saddr = (uint32_t)src;
+	sz >>= 1;	/* we'll transfer words */
+	VDP_SET_REG_NOSHADOW(VDP_REG_MSET2,
+			vdp_shadow_reg[VDP_REG_MSET2] | VDP_MSET2_DMA_BIT);
+	VDP_SET_REG(VDP_REG_AUTOINC, 2);
+	VDP_SET_REG(VDP_REG_DMALEN_LOW, sz);
+	VDP_SET_REG(VDP_REG_DMALEN_HIGH, sz >> 8);
+	VDP_SET_REG(VDP_REG_DMA_SADDR_LOW, saddr >> 1);
+	VDP_SET_REG(VDP_REG_DMA_SADDR_MID, saddr >> 9);
+	VDP_SET_REG(VDP_REG_DMA_SADDR_HIGH, saddr >> 17);
+
+	VDP_PORT_CTL = (vaddr & 0x3ffe) | 
+}
diff -r 862f8a034cae -r 8253942b0a1a src/vdp.h
--- a/src/vdp.h	Sat Feb 11 08:56:42 2017 +0200
+++ b/src/vdp.h	Sun Feb 19 14:00:26 2017 +0200
@@ -11,16 +11,16 @@
 #define VDP_PORT_PSG		(*(volatile uint16_t*)0xc00010)
 
 /* registers */
-#define VDP_REG_MODE1			0
-#define VDP_REG_MODE2			1
+#define VDP_REG_MSET1			0
+#define VDP_REG_MSET2			1
 #define VDP_REG_PADDR_A			2
 #define VDP_REG_PADDR_WIN		3
 #define VDP_REG_PADDR_B			4
 #define VDP_REG_SPRITE			5
 #define VDP_REG_BGCOLOR			7
 #define VDP_REG_HINT			10
-#define VDP_REG_MODE3			11
-#define VDP_REG_MODE4			12
+#define VDP_REG_MSET3			11
+#define VDP_REG_MSET4			12
 #define VDP_REG_HSCROLL			13
 #define VDP_REG_AUTOINC			15
 #define VDP_REG_SCROLL_SIZE		16
@@ -32,6 +32,9 @@
 #define VDP_REG_DMA_SADDR_MID	22
 #define VDP_REG_DMA_SADDR_HIGH	23
 
+/* shadow copy of any register we set */
+unsigned char vdp_shadow_reg[24];
+
 /* control register read flags */
 #define VDP_CTL_PAL_BIT			0x0001
 #define VDP_CTL_HBLANK_BIT		0x0002
@@ -49,31 +52,33 @@
 #define VDP_CTL_DATA_MASK		0x00ff
 
 #define VDP_RSET(reg, val)	\
-	(0x8000 | (VDP_CTL_REGSEL_MASK & ((uint16_t)(reg) << 8)) | \
+	(0x8000ul | (VDP_CTL_REGSEL_MASK & ((uint16_t)(reg) << 8)) | \
 	 (VDP_CTL_DATA_MASK & (uint16_t)(val)))
 
 #define VDP_SET_REG(reg, val) \
+	do { VDP_PORT_CTL = vdp_shadow_reg[reg] = VDP_RSET(reg, val); } while(0)
+#define VDP_SET_REG_NOSHADOW(reg, val) \
 	do { VDP_PORT_CTL = VDP_RSET(reg, val); } while(0)
 
-#define VDP_REG0_BASE		4
-#define VDP_REG0_HVCNT_BIT	0x02
-#define VDP_REG0_HINTR_BIT	0x10
+#define VDP_MSET1_BASE		4
+#define VDP_MSET1_HVCNT_BIT	0x02
+#define VDP_MSET1_HINTR_BIT	0x10
 
-#define VDP_REG1_BASE		4
-#define VDP_REG1_30CELL_BIT	0x08
-#define VDP_REG1_DMA_BIT	0x10
-#define VDP_REG1_VINTR_BIT	0x20
-#define VDP_REG1_DISP_BIT	0x40
-#define VDP_REG1_XVRAM_BIT	0x80
+#define VDP_MSET2_BASE		4
+#define VDP_MSET2_30CELL_BIT	0x08
+#define VDP_MSET2_DMA_BIT	0x10
+#define VDP_MSET2_VINTR_BIT	0x20
+#define VDP_MSET2_DISP_BIT	0x40
+#define VDP_MSET2_XVRAM_BIT	0x80
 
 #define VDP_MODE_WR_BIT		1
 
 #define VDP_VRAM_WR		1
 #define VDP_CRAM_WR		3
 
-#define VDP_DMA_MEM_TO_VRAM		0
-#define VDP_DMA_VRAM_FILL		2
-#define VDP_DMA_VRAM_COPY		3
+#define VDP_DMA_MEM_VRAM		0
+#define VDP_DMA_VRAM_FILL		0x80
+#define VDP_DMA_VRAM_COPY		0xc0
 
 #define VDP_ADDRSET(addr, mode) /* TODO */
 
@@ -101,6 +106,13 @@
 #define VDP_SET_BGCOLOR(pal, col) \
 	do { VDP_SET_REG(VDP_REG_BGCOLOR, ((pal) << 4) | (col)); } while(0)
 
+#define VDP_TILE_HFLIP	(1 << 11)
+#define VDP_TILE_VFLIP	(1 << 12)
+#define VDP_TILE_PRIO	(1 << 15)
+
+#define VDP_MKTILE(tidx, pal, flags)	\
+	(((uint16_t)tidx) | ((uint16_t)(pal) << 13) | (flags))
+
 /* arguments to vdp_tilemap_slot */
 #define VDP_PLANE_A		0
 #define VDP_PLANE_WIN	1
@@ -108,7 +120,7 @@
 
 int vdp_init(void);
 void vdp_set_tilemap_slot(int plane, int slot);
-void *vdp_tilemap_ptr(int plane);
+uint32_t vdp_tilemap_addr(int plane);
 void vdp_setpal_rgb24(int idx, int r, int g, int b);
 void vdp_setpal(int idx0, int count, unsigned char *pal);
 /* TODO vdp_setpal_dma */
@@ -116,4 +128,6 @@
 /* xtiles and ytiles can only be 32, 64, or 128 */
 void vdp_set_scroll_size(int xtiles, int ytiles);
 
+void vdp_memcpy(uint32_t vaddr, void *src, int sz);
+
 #endif	/* VDP_H_ */