megadrive_test1
view src/intr.s @ 2:51d1d6761601
copied the bgset code from samurai's article to test that my dev setup is
actually working
| author | John Tsiombikas <nuclear@member.fsf.org> |
|---|---|
| date | Mon, 30 Jan 2017 16:57:51 +0200 |
| parents | |
| children |
line source
1 | the following will go into the .vect section which will be placed at the very
2 | begining of the binary at address 0 by the linker (see lnkscript).
3 .section .vect,"a"
4 .extern start
5 | exception vectors
6 .long _stacktop | 00 reset - initial SSP
7 .long start | 01 reset - initial PC
8 .long intr_fatal | 02 bus error
9 .long intr_fatal | 03 address error
10 .long intr_fatal | 04 illegal instruction
11 .long intr_fatal | 05 zero divide
12 .long intr_fatal | 06 chk instruction
13 .long intr_fatal | 07 trapv instruction
14 .long intr_fatal | 08 privilege violation
15 .long intr_fatal | 09 trace
16 .long intr_fatal | 0a line 1010 emulator
17 .long intr_fatal | 0b line 1111 emulator
18 .long intr_fatal | 0c reserved
19 .long intr_fatal | 0d reserved
20 .long intr_fatal | 0e format error (mc68010 only)
21 .long intr_fatal | 0f uninitialized interrupt vector
22 .long intr_fatal | 10 \
23 .long intr_fatal | 11 |
24 .long intr_fatal | 12 |
25 .long intr_fatal | 13 > reserved
26 .long intr_fatal | 14 |
27 .long intr_fatal | 15 |
28 .long intr_fatal | 16 |
29 .long intr_fatal | 17 /
30 .long intr_fatal | 18 spurious interrupt
31 .long intr_fatal | 19 level 1 interrupt
32 .long intr_fatal | 1a level 2 interrupt
33 .long intr_fatal | 1b level 3 interrupt
34 .long intr_hblank | 1c level 4 interrupt (hblank in the mega drive)
35 .long intr_fatal | 1d level 5 interrupt
36 .long intr_vblank | 1e level 6 interrupt (vblank in the mega drive)
37 .long intr_fatal | 1f level 7 interrupt
38 .long intr_fatal | 20 trap 0
39 .long intr_fatal | 21 trap 1
40 .long intr_fatal | 22 trap 2
41 .long intr_fatal | 23 trap 3
42 .long intr_fatal | 24 trap 4
43 .long intr_fatal | 25 trap 5
44 .long intr_fatal | 26 trap 6
45 .long intr_fatal | 27 trap 7
46 .long intr_fatal | 28 trap 8
47 .long intr_fatal | 29 trap 9
48 .long intr_fatal | 2a trap a
49 .long intr_fatal | 2b trap b
50 .long intr_fatal | 2c trap c
51 .long intr_fatal | 2d trap d
52 .long intr_fatal | 2e trap e
53 .long intr_fatal | 2f trap f
54 .long intr_fatal | 30 \
55 .long intr_fatal | 31 |
56 .long intr_fatal | 32 |
57 .long intr_fatal | 33 |
58 .long intr_fatal | 34 |
59 .long intr_fatal | 35 |
60 .long intr_fatal | 36 |
61 .long intr_fatal | 37 |
62 .long intr_fatal | 38 > reserved
63 .long intr_fatal | 39 |
64 .long intr_fatal | 3a |
65 .long intr_fatal | 3b |
66 .long intr_fatal | 3c |
67 .long intr_fatal | 3d |
68 .long intr_fatal | 3e |
69 .long intr_fatal | 3f /
71 | from here on we continue in the regular .text section since we don't care
72 | where this code ends up.
73 .text
74 | interrupt handlers
75 intr_fatal:
76 stop #0x2700
78 | TODO hblank/vblank code
79 intr_hblank:
80 rte
81 intr_vblank:
82 rte