kern
view src/vm-asm.S @ 29:8ea6debe4265
starting on the task switching implementation
author | John Tsiombikas <nuclear@siggraph.org> |
---|---|
date | Sat, 23 Apr 2011 00:51:18 +0300 |
parents | 098b1cb5eeaa |
children | 387078ef5c0d |
line source
1 .text
2 /* enable_paging(void)
3 * sets the cr0 bit 31 which enables page translation */
4 .globl enable_paging
5 enable_paging:
6 movl %cr0, %eax
7 orl $0x80000000, %eax
8 movl %eax, %cr0
9 ret
11 /* disable_paging(void)
12 * clears the cr0 bit 31 */
13 .globl disable_paging
14 disable_paging:
15 movl %cr0, %eax
16 andl $0x7fffffff, %eax
17 movl %eax, %cr0
18 ret
20 .globl get_paging_status
21 get_paging_status:
22 movl %cr0, %eax
23 shr $31, %eax
24 ret
26 /* set_pgdir_addr(uint32_t addr)
27 * sets the address of the page directory by writing to cr3, which
28 * also results in a TLB flush. */
29 .globl set_pgdir_addr
30 set_pgdir_addr:
31 movl 4(%esp), %eax
32 movl %eax, %cr3
33 ret
35 /* flush_tlb(void)
36 * invalidates the whole TLB. entries for pages marked as global
37 * are unaffected */
38 .globl flush_tlb
39 flush_tlb:
40 movl %cr3, %eax
41 movl %eax, %cr3
42 ret
44 /* flush_tlb_addr(uint32_t addr)
45 * flushes the TLB entry for the page containing a particular
46 * virtual address */
47 .globl flush_tlb_addr
48 flush_tlb_addr:
49 movl 4(%esp), %eax
50 invlpg (%eax)
51 ret
53 /* get_fault_addr(void)
54 * returns the contents of control register 2, which provides
55 * the faulting address during a page fault exception
56 */
57 .globl get_fault_addr
58 get_fault_addr:
59 movl %cr2, %eax
60 ret