gbasys
view src/comm.c @ 3:06726f0b8cd3
foo
| author | John Tsiombikas <nuclear@member.fsf.org> |
|---|---|
| date | Thu, 08 Mar 2012 14:37:17 +0200 |
| parents | e3dc7705ad9c |
| children | 72c6429ae953 |
line source
1 /*
2 gbasys - a gameboy advance hardware abstraction library
3 Copyright (C) 2004-2012 John Tsiombikas <nuclear@member.fsf.org>
5 This program is free software: you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation, either version 3 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
19 #include "comm.h"
20 #include "error.h"
21 #include "signal.h"
22 #include "intr.h"
24 #define REG_SIODATA32 *((volatile unsigned short*)0x4000120)
25 #define REG_SIOCNT *((volatile unsigned short*)0x4000128)
26 #define REG_SIODATA8 *((volatile unsigned short*)0x400012a)
27 #define REG_RCNT *((volatile unsigned short*)0x4000134)
29 /* REG_SIOCNT bits */
30 #define SIOCNT_CLK_INTERN (1 << 0)
31 #define SIOCNT_CLK_2MHZ (1 << 1)
32 #define SIOCNT_RECV_ENABLE (1 << 2)
33 #define SIOCNT_SEND_ENABLE (1 << 3)
34 #define SIOCNT_START (1 << 7)
35 #define SIOCNT_XFER_LEN (1 << 12)
36 #define SIOCNT_INT_ENABLE (1 << 14)
38 /* only in 16bit multi player mode */
39 #define SIOCNT_BAUD_38400 1
40 #define SIOCNT_BAUD_57600 2
41 #define SIOCNT_BAUD_115200 3
42 #define SIOCNT_SI_STATUS (1 << 2)
43 #define SIOCNT_SD_STATUS (1 << 3)
44 #define SIOCNT_SLAVE1 (1 << 4)
45 #define SIOCNT_SLAVE2 (2 << 4)
46 #define SIOCNT_SLAVE3 (3 << 4)
47 #define SIOCNT_ERROR (1 << 6)
49 /* REG_RCNT bits */
50 #define RCNT_GPIO_DATA_MASK 0x000f
51 #define RCNT_GPIO_DIR_MASK 0x00f0
52 #define RCNT_GPIO_INT_ENABLE (1 << 8)
53 #define RCNT_MODE_GPIO 0x8000
54 #define RCNT_MODE_JOYBUS 0xc000
57 static void setup_sio(int bits, int ms);
58 static void setup_gpio(void);
59 static void comm_intr(void);
61 static int sio_bits, sio_master;
62 static void *sio_buf;
65 void comm_setup(int mode)
66 {
67 int master = 0;
69 mask(INTR_COMM);
70 interrupt(INTR_COMM, comm_intr);
71 unmask(INTR_COMM);
73 switch(mode) {
74 case COMM_SIO8_MASTER:
75 master = 1;
76 case COMM_SIO8_SLAVE:
77 setup_sio(8, master);
78 break;
80 case COMM_SIO32_MASTER:
81 master = 1;
82 case COMM_SIO32_SLAVE:
83 setup_sio(32, master);
84 break;
86 case COMM_GPIO:
87 setup_gpio();
88 break;
90 default:
91 panic("unimplemented comm mode\n");
92 }
93 }
95 static void setup_sio(int bits, int ms)
96 {
97 REG_RCNT = 0; /* serial mode */
99 sio_bits = bits;
100 sio_master = ms;
101 }
103 void sio_transfer(void *in, const void *out)
104 {
105 /* load outgoing data */
106 if(sio_bits <= 8) {
107 REG_SIODATA8 = *(unsigned char*)out;
108 } else {
109 REG_SIODATA32 = *(unsigned long*)out;
110 }
111 sio_buf = in;
113 /* IE=1, external clock, send enable */
114 REG_SIOCNT = SIOCNT_INT_ENABLE | SIOCNT_SEND_ENABLE;
116 /* start transfer */
117 REG_SIOCNT |= SIOCNT_START;
119 /* wait until the transfer is complete */
120 while(REG_SIOCNT & SIOCNT_START);
121 }
123 void sio_transfer_async(void *in, const void *out)
124 {
125 /* load outgoing data */
126 if(sio_bits <= 8) {
127 REG_SIODATA8 = *(unsigned char*)out;
128 } else {
129 REG_SIODATA32 = *(unsigned long*)out;
130 }
131 sio_buf = in;
133 /* IE=1, external clock, send enable */
134 REG_SIOCNT = SIOCNT_INT_ENABLE | SIOCNT_SEND_ENABLE;
136 /* start transfer */
137 REG_SIOCNT |= SIOCNT_START;
138 }
141 static void setup_gpio(void)
142 {
143 REG_RCNT = RCNT_MODE_GPIO | RCNT_GPIO_INT_ENABLE;
144 }
146 void gpio_dir(int dir_so, int dir_si, int dir_sd, int dir_sc)
147 {
148 unsigned char mask;
150 mask = ((dir_so & 1) << 7) | ((dir_si & 1) << 6) | ((dir_sd & 1) << 5) |
151 ((dir_sc & 1) << 4);
152 gpio_dir_mask(mask);
153 }
155 void gpio_dir_mask(unsigned char dir)
156 {
157 REG_RCNT = (REG_RCNT & 0xff0f) | ((dir & 0xf) << 4);
158 }
160 void gpio_set(unsigned char val)
161 {
162 REG_RCNT = (REG_RCNT & 0xfff0) | (val & 0xf);
163 }
165 unsigned char gpio_get(void)
166 {
167 return REG_RCNT & 0xf;
168 }
170 static void comm_intr(void)
171 {
172 if(sio_buf) {
173 if(REG_SIOCNT & SIOCNT_START) {
174 panic("asio: interrupt with start bit == 1");
175 }
176 if(sio_bits <= 8) {
177 *(unsigned char*)sio_buf = REG_SIODATA8;
178 } else {
179 *(unsigned long*)sio_buf = REG_SIODATA32;
180 }
181 sio_buf = 0;
182 }
184 if(signal_func(SIGIO)) {
185 raise(SIGIO);
186 }
187 }