1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/.hgignore	Tue Jul 25 08:17:34 2017 +0300
     1.3 @@ -0,0 +1,5 @@
     1.4 +\.o$
     1.5 +\.d$
     1.6 +\.swp$
     1.7 +^cyberspace$
     1.8 +data/

     2.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     2.2 +++ b/Makefile	Tue Jul 25 08:17:34 2017 +0300
     2.3 @@ -0,0 +1,21 @@
     2.4 +csrc = $(wildcard src/*.c)
     2.5 +ssrc = $(wildcard src/*.s)
     2.6 +obj = $(csrc:.c=.o) $(ssrc:.s=.o)
     2.7 +img = data/backdrop2.img
     2.8 +bin = cyberspace
     2.9 +
    2.10 +CC = vc
    2.11 +LDFLAGS = -lamiga
    2.12 +
    2.13 +$(bin): $(img) $(obj)
    2.14 +	$(CC) -o $@ $(obj) $(LDFLAGS)
    2.15 +
    2.16 +%.o: %.s
    2.17 +	$(CC) $(ASFLAGS) -o $@ -c $<
    2.18 +
    2.19 +data/backdrop2.img: data/backdrop2.ilbm
    2.20 +	lbm2bin -i -4 -v -c 480x128 $<
    2.21 +
    2.22 +.PHONY: clean
    2.23 +clean:
    2.24 +	rm -f $(obj) $(bin) data/backdrop2.img

     3.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.2 +++ b/src/data.s	Tue Jul 25 08:17:34 2017 +0300
     3.3 @@ -0,0 +1,5 @@
     3.4 +	section data_c,data,chip
     3.5 +	cnop 0,4
     3.6 +	public _backdrop
     3.7 +_backdrop:
     3.8 +	incbin "data/backdrop2.img"

     4.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     4.2 +++ b/src/hwregs.h	Tue Jul 25 08:17:34 2017 +0300
     4.3 @@ -0,0 +1,392 @@
     4.4 +#ifndef HWREGS_H_
     4.5 +#define HWREGS_H_
     4.6 +
     4.7 +#include "inttypes.h"
     4.8 +
     4.9 +#define REG_BASE_ADDR	0xdff000
    4.10 +
    4.11 +#define REGN_BLTDDAT	0x000
    4.12 +#define REGN_DMACONR	0x002
    4.13 +#define REGN_VPOSR		0x004
    4.14 +#define REGN_VHPOSR		0x006
    4.15 +#define REGN_DSKDATR	0x008
    4.16 +#define REGN_JOY0DAT	0x00a
    4.17 +#define REGN_JOY1DAT	0x00c
    4.18 +#define REGN_CLXDAT		0x00e
    4.19 +#define REGN_ADKCONR	0x010
    4.20 +#define REGN_POT0DAT	0x012
    4.21 +#define REGN_POT1DAT	0x014
    4.22 +#define REGN_POTGOR		0x016
    4.23 +#define REGN_SERDATR	0x018
    4.24 +#define REGN_DSKBYTR	0x01a
    4.25 +#define REGN_INTENAR	0x01c
    4.26 +#define REGN_INTREQR	0x01e
    4.27 +#define REGN_DSKPTH		0x020
    4.28 +#define REGN_DSKPTL		0x022
    4.29 +#define REGN_DSKLEN		0x024
    4.30 +#define REGN_DSKDAT		0x026
    4.31 +#define REGN_REFPTR		0x028
    4.32 +#define REGN_VPOSW		0x02a
    4.33 +#define REGN_VHPOSW		0x02c
    4.34 +#define REGN_COPCON		0x02e
    4.35 +#define REGN_SERDAT		0x030
    4.36 +#define REGN_SERPER		0x032
    4.37 +#define REGN_POTGO		0x034
    4.38 +#define REGN_JOYTEST	0x036
    4.39 +#define REGN_STREQU		0x038
    4.40 +#define REGN_STRVBL		0x03a
    4.41 +#define REGN_STRHOR		0x03c
    4.42 +#define REGN_STRLONG	0x03e
    4.43 +#define REGN_BLTCON0	0x040
    4.44 +#define REGN_BLTCON1	0x042
    4.45 +#define REGN_BLTAFWM	0x044
    4.46 +#define REGN_BLTALWM	0x046
    4.47 +#define REGN_BLTCPTH	0x048
    4.48 +#define REGN_BLTCPTL	0x04a
    4.49 +#define REGN_BLTBPTH	0x04c
    4.50 +#define REGN_BLTBPTL	0x04e
    4.51 +#define REGN_BLTAPTH	0x050
    4.52 +#define REGN_BLTAPTL	0x052
    4.53 +#define REGN_BLTDPTH	0x054
    4.54 +#define REGN_BLTDPTL	0x056
    4.55 +#define REGN_BLTSIZE	0x058
    4.56 +#define REGN_BLTCON0L	0x05a
    4.57 +#define REGN_BLTSIZV	0x05c
    4.58 +#define REGN_BLTSIZH	0x05e
    4.59 +#define REGN_BLTCMOD	0x060
    4.60 +#define REGN_BLTBMOD	0x062
    4.61 +#define REGN_BLTAMOD	0x064
    4.62 +#define REGN_BLTDMOD	0x066
    4.63 +#define REGN_BLTCDAT	0x070
    4.64 +#define REGN_BLTBDAT	0x072
    4.65 +#define REGN_BLTADAT	0x074
    4.66 +#define REGN_SPRHDAT	0x078
    4.67 +#define REGN_DENISEID	0x07c
    4.68 +#define REGN_DSKSYNC	0x07e
    4.69 +#define REGN_COP1LCH	0x080
    4.70 +#define REGN_COP1LCL	0x082
    4.71 +#define REGN_COP2LCH	0x084
    4.72 +#define REGN_COP2LCL	0x086
    4.73 +#define REGN_CMPJMP1	0x088
    4.74 +#define REGN_CMPJMP2	0x08a
    4.75 +#define REGN_COPINS		0x08c
    4.76 +#define REGN_DIWSTART	0x08e
    4.77 +#define REGN_DIWSTOP	0x090
    4.78 +#define REGN_DDFSTART	0x092
    4.79 +#define REGN_DDFSTOP	0x094
    4.80 +#define REGN_DMACON		0x096
    4.81 +#define REGN_CLXCON		0x098
    4.82 +#define REGN_INTENA		0x09a
    4.83 +#define REGN_INTREQ		0x09c
    4.84 +#define REGN_ADKCON		0x09e
    4.85 +
    4.86 +#define REGN_AUDIO_LCH(c)	(REGN_AUDIO0_BASE + (c) * 16 + 0)
    4.87 +#define REGN_AUDIO_LCL(c)	(REGN_AUDIO0_BASE + (c) * 16 + 2)
    4.88 +#define REGN_AUDIO_LEN(c)	(REGN_AUDIO0_BASE + (c) * 16 + 4)
    4.89 +#define REGN_AUDIO_PER(c)	(REGN_AUDIO0_BASE + (c) * 16 + 6)
    4.90 +#define REGN_AUDIO_VOL(c)	(REGN_AUDIO0_BASE + (c) * 16 + 8)
    4.91 +#define REGN_AUDIO_DAT(c)	(REGN_AUDIO0_BASE + (c) * 16 + 10)
    4.92 +
    4.93 +#define REGN_AUDIO0_BASE	0x0a0
    4.94 +#define REGN_AUD0LCH		(REGN_AUDIO0_BASE + 0)
    4.95 +#define REGN_AUD0LCL		(REGN_AUDIO0_BASE + 2)
    4.96 +#define REGN_AUD0LEN		(REGN_AUDIO0_BASE + 4)
    4.97 +#define REGN_AUD0PER		(REGN_AUDIO0_BASE + 6)
    4.98 +#define REGN_AUD0VOL		(REGN_AUDIO0_BASE + 8)
    4.99 +#define REGN_AUD0DAT		(REGN_AUDIO0_BASE + 10)
   4.100 +#define REGN_AUDIO1_BASE	0x0b0
   4.101 +#define REGN_AUD1LCH		(REGN_AUDIO1_BASE + 0)
   4.102 +#define REGN_AUD1LCL		(REGN_AUDIO1_BASE + 2)
   4.103 +#define REGN_AUD1LEN		(REGN_AUDIO1_BASE + 4)
   4.104 +#define REGN_AUD1PER		(REGN_AUDIO1_BASE + 6)
   4.105 +#define REGN_AUD1VOL		(REGN_AUDIO1_BASE + 8)
   4.106 +#define REGN_AUD1DAT		(REGN_AUDIO1_BASE + 10)
   4.107 +#define REGN_AUDIO2_BASE	0x0c0
   4.108 +#define REGN_AUD2LCH		(REGN_AUDIO2_BASE + 0)
   4.109 +#define REGN_AUD2LCL		(REGN_AUDIO2_BASE + 2)
   4.110 +#define REGN_AUD2LEN		(REGN_AUDIO2_BASE + 4)
   4.111 +#define REGN_AUD2PER		(REGN_AUDIO2_BASE + 6)
   4.112 +#define REGN_AUD2VOL		(REGN_AUDIO2_BASE + 8)
   4.113 +#define REGN_AUD2DAT		(REGN_AUDIO2_BASE + 10)
   4.114 +#define REGN_AUDIO3_BASE	0x0d0
   4.115 +#define REGN_AUD3LCH		(REGN_AUDIO3_BASE + 0)
   4.116 +#define REGN_AUD3LCL		(REGN_AUDIO3_BASE + 2)
   4.117 +#define REGN_AUD3LEN		(REGN_AUDIO3_BASE + 4)
   4.118 +#define REGN_AUD3PER		(REGN_AUDIO3_BASE + 6)
   4.119 +#define REGN_AUD3VOL		(REGN_AUDIO3_BASE + 8)
   4.120 +#define REGN_AUD3DAT		(REGN_AUDIO3_BASE + 10)
   4.121 +
   4.122 +#define REGN_BPL1PTH	0x0e0
   4.123 +#define REGN_BPL1PTL	0x0e2
   4.124 +#define REGN_BPL2PTH	0x0e4
   4.125 +#define REGN_BPL2PTL	0x0e6
   4.126 +#define REGN_BPL3PTH	0x0e8
   4.127 +#define REGN_BPL3PTL	0x0ea
   4.128 +#define REGN_BPL4PTH	0x0ec
   4.129 +#define REGN_BPL4PTL	0x0ee
   4.130 +#define REGN_BPL5PTH	0x0f0
   4.131 +#define REGN_BPL5PTL	0x0f2
   4.132 +#define REGN_BPL6PTH	0x0f4
   4.133 +#define REGN_BPL6PTL	0x0f6
   4.134 +#define REGN_BPLCON0	0x100
   4.135 +#define REGN_BPLCON1	0x102
   4.136 +#define REGN_BPLCON2	0x104
   4.137 +#define REGN_BPLCON3	0x106
   4.138 +#define REGN_BPL1MOD	0x108
   4.139 +#define REGN_BPL2MOD	0x10a
   4.140 +#define REGN_BPL1DAT	0x110
   4.141 +#define REGN_BPL2DAT	0x112
   4.142 +#define REGN_BPL3DAT	0x114
   4.143 +#define REGN_BPL4DAT	0x116
   4.144 +#define REGN_BPL5DAT	0x118
   4.145 +#define REGN_BPL6DAT	0x11a
   4.146 +
   4.147 +#define REGN_SPR0PTH	0x120
   4.148 +#define REGN_SPR0PTL	0x122
   4.149 +#define REGN_SPR1PTH	0x124
   4.150 +#define REGN_SPR1PTL	0x126
   4.151 +#define REGN_SPR2PTH	0x128
   4.152 +#define REGN_SPR2PTL	0x12a
   4.153 +#define REGN_SPR3PTH	0x12c
   4.154 +#define REGN_SPR3PTL	0x12e
   4.155 +#define REGN_SPR4PTH	0x130
   4.156 +#define REGN_SPR4PTL	0x132
   4.157 +#define REGN_SPR5PTH	0x134
   4.158 +#define REGN_SPR5PTL	0x136
   4.159 +#define REGN_SPR6PTH	0x138
   4.160 +#define REGN_SPR6PTL	0x13a
   4.161 +#define REGN_SPR7PTH	0x13c
   4.162 +#define REGN_SPR7PTL	0x13e
   4.163 +
   4.164 +#define REGN_SPRITE_POS(s)	(REGN_SPRITE0_BASE + (s) * 8 + 0)
   4.165 +#define REGN_SPRITE_CTL(s)	(REGN_SPRITE0_BASE + (s) * 8 + 2)
   4.166 +#define REGN_SPRITE_DATA(s)	(REGN_SPRITE0_BASE + (s) * 8 + 4)
   4.167 +#define REGN_SPRITE_DATB(s)	(REGN_SPRITE0_BASE + (s) * 8 + 6)
   4.168 +
   4.169 +#define REGN_SPRITE0_BASE	0x140
   4.170 +#define REGN_SPR0POS		REGN_SPRITE_POS(0)
   4.171 +#define REGN_SPR0CTL		REGN_SPRITE_CTL(0)
   4.172 +#define REGN_SPR0DATA		REGN_SPRITE_DATA(0)
   4.173 +#define REGN_SPR0DATB		REGN_SPRITE_DATB(0)
   4.174 +#define REGN_SPRITE1_BASE	0x148
   4.175 +#define REGN_SPR1POS		REGN_SPRITE_POS(1)
   4.176 +#define REGN_SPR1CTL		REGN_SPRITE_CTL(1)
   4.177 +#define REGN_SPR1DATA		REGN_SPRITE_DATA(1)
   4.178 +#define REGN_SPR1DATB		REGN_SPRITE_DATB(1)
   4.179 +#define REGN_SPRITE2_BASE	0x150
   4.180 +#define REGN_SPR2POS		REGN_SPRITE_POS(2)
   4.181 +#define REGN_SPR2CTL		REGN_SPRITE_CTL(2)
   4.182 +#define REGN_SPR2DATA		REGN_SPRITE_DATA(2)
   4.183 +#define REGN_SPR2DATB		REGN_SPRITE_DATB(2)
   4.184 +#define REGN_SPRITE3_BASE	0x158
   4.185 +#define REGN_SPR3POS		REGN_SPRITE_POS(3)
   4.186 +#define REGN_SPR3CTL		REGN_SPRITE_CTL(3)
   4.187 +#define REGN_SPR3DATA		REGN_SPRITE_DATA(3)
   4.188 +#define REGN_SPR3DATB		REGN_SPRITE_DATB(3)
   4.189 +#define REGN_SPRITE4_BASE	0x160
   4.190 +#define REGN_SPR4POS		REGN_SPRITE_POS(4)
   4.191 +#define REGN_SPR4CTL		REGN_SPRITE_CTL(4)
   4.192 +#define REGN_SPR4DATA		REGN_SPRITE_DATA(4)
   4.193 +#define REGN_SPR4DATB		REGN_SPRITE_DATB(4)
   4.194 +#define REGN_SPRITE5_BASE	0x168
   4.195 +#define REGN_SPR5POS		REGN_SPRITE_POS(5)
   4.196 +#define REGN_SPR5CTL		REGN_SPRITE_CTL(5)
   4.197 +#define REGN_SPR5DATA		REGN_SPRITE_DATA(5)
   4.198 +#define REGN_SPR5DATB		REGN_SPRITE_DATB(5)
   4.199 +#define REGN_SPRITE6_BASE	0x170
   4.200 +#define REGN_SPR6POS		REGN_SPRITE_POS(6)
   4.201 +#define REGN_SPR6CTL		REGN_SPRITE_CTL(6)
   4.202 +#define REGN_SPR6DATA		REGN_SPRITE_DATA(6)
   4.203 +#define REGN_SPR6DATB		REGN_SPRITE_DATB(6)
   4.204 +#define REGN_SPRITE7_BASE	0x178
   4.205 +#define REGN_SPR7POS		REGN_SPRITE_POS(7)
   4.206 +#define REGN_SPR7CTL		REGN_SPRITE_CTL(7)
   4.207 +#define REGN_SPR7DATA		REGN_SPRITE_DATA(7)
   4.208 +#define REGN_SPR7DATB		REGN_SPRITE_DATB(7)
   4.209 +
   4.210 +#define REGN_COLOR_BASE		0x180
   4.211 +#define REGN_COLOR(idx)		(REGN_COLOR_BASE + (idx) * 2)
   4.212 +
   4.213 +#define REGN_COLOR0			REGN_COLOR(0)
   4.214 +#define REGN_COLOR1			REGN_COLOR(1)
   4.215 +#define REGN_COLOR2			REGN_COLOR(2)
   4.216 +#define REGN_COLOR3			REGN_COLOR(3)
   4.217 +#define REGN_COLOR4			REGN_COLOR(4)
   4.218 +#define REGN_COLOR5			REGN_COLOR(5)
   4.219 +#define REGN_COLOR6			REGN_COLOR(6)
   4.220 +#define REGN_COLOR7			REGN_COLOR(7)
   4.221 +#define REGN_COLOR8			REGN_COLOR(8)
   4.222 +#define REGN_COLOR9			REGN_COLOR(9)
   4.223 +#define REGN_COLOR10		REGN_COLOR(10)
   4.224 +#define REGN_COLOR11		REGN_COLOR(11)
   4.225 +#define REGN_COLOR12		REGN_COLOR(12)
   4.226 +#define REGN_COLOR13		REGN_COLOR(13)
   4.227 +#define REGN_COLOR14		REGN_COLOR(14)
   4.228 +#define REGN_COLOR15		REGN_COLOR(15)
   4.229 +#define REGN_COLOR16		REGN_COLOR(16)
   4.230 +#define REGN_COLOR17		REGN_COLOR(17)
   4.231 +#define REGN_COLOR18		REGN_COLOR(18)
   4.232 +#define REGN_COLOR19		REGN_COLOR(19)
   4.233 +#define REGN_COLOR20		REGN_COLOR(20)
   4.234 +#define REGN_COLOR21		REGN_COLOR(21)
   4.235 +#define REGN_COLOR22		REGN_COLOR(22)
   4.236 +#define REGN_COLOR23		REGN_COLOR(23)
   4.237 +#define REGN_COLOR24		REGN_COLOR(24)
   4.238 +#define REGN_COLOR25		REGN_COLOR(25)
   4.239 +#define REGN_COLOR26		REGN_COLOR(26)
   4.240 +#define REGN_COLOR27		REGN_COLOR(27)
   4.241 +#define REGN_COLOR28		REGN_COLOR(28)
   4.242 +#define REGN_COLOR29		REGN_COLOR(29)
   4.243 +#define REGN_COLOR30		REGN_COLOR(30)
   4.244 +#define REGN_COLOR31		REGN_COLOR(31)
   4.245 +
   4.246 +#define REGN_HTOTAL		0x1c0
   4.247 +#define REGN_HSSTOP		0x1c2
   4.248 +#define REGN_HBSTART	0x1c4
   4.249 +#define REGN_HBSTOP		0x1c6
   4.250 +#define REGN_VTOTAL		0x1c8
   4.251 +#define REGN_VSSTOP		0x1ca
   4.252 +#define REGN_VBSTART	0x1cc
   4.253 +#define REGN_VBSTOP		0x1ce
   4.254 +#define REGN_BEAMCON0	0x1dc
   4.255 +#define REGN_HSSTART	0x1de
   4.256 +#define REGN_VSSTART	0x1e0
   4.257 +#define REGN_HCENTER	0x1e2
   4.258 +#define REGN_DIWHIGH	0x1e4
   4.259 +
   4.260 +#define REG(r)	(*(volatile uint16_t*)(REG_BASE_ADDR | (r)))
   4.261 +
   4.262 +#define REG_CIAA_PORTA	*(volatile uint8_t*)0xbfe001
   4.263 +
   4.264 +#define REG_INTENA		REG(REGN_INTENA)
   4.265 +#define REG_INTENAR		REG(REGN_INTENAR)
   4.266 +#define REG_INTREQ		REG(REGN_INTREQ)
   4.267 +#define REG_INTREQR		REG(REGN_INTREQR)
   4.268 +#define REG_ADKCON		REG(REGN_ADKCON)
   4.269 +#define REG_ADKCONR		REG(REGN_ADKCONR)
   4.270 +#define REG_DMACON		REG(REGN_DMACON)
   4.271 +#define REG_DMACONR		REG(REGN_DMACONR)
   4.272 +#define REG_BPLCON0		REG(REGN_BPLCON0)
   4.273 +#define REG_BPLCON1		REG(REGN_BPLCON1)
   4.274 +#define REG_BPLCON2		REG(REGN_BPLCON2)
   4.275 +#define REG_BPL1PTH		REG(REGN_BPL1PTH)
   4.276 +#define REG_BPL2PTH		REG(REGN_BPL2PTH)
   4.277 +#define REG_BPL3PTH		REG(REGN_BPL3PTH)
   4.278 +#define REG_BPL4PTH		REG(REGN_BPL4PTH)
   4.279 +#define REG_BPL5PTH		REG(REGN_BPL5PTH)
   4.280 +#define REG_BPL6PTH		REG(REGN_BPL6PTH)
   4.281 +#define REG32_BPL1PT	*(volatile uint32_t*)(REG_BASE_ADDR | REGN_BPL1PTH)
   4.282 +#define REG32_BPL2PT	*(volatile uint32_t*)(REG_BASE_ADDR | REGN_BPL2PTH)
   4.283 +#define REG32_BPL3PT	*(volatile uint32_t*)(REG_BASE_ADDR | REGN_BPL3PTH)
   4.284 +#define REG32_BPL4PT	*(volatile uint32_t*)(REG_BASE_ADDR | REGN_BPL4PTH)
   4.285 +#define REG32_BPL5PT	*(volatile uint32_t*)(REG_BASE_ADDR | REGN_BPL5PTH)
   4.286 +#define REG32_BPL6PT	*(volatile uint32_t*)(REG_BASE_ADDR | REGN_BPL6PTH)
   4.287 +#define REG_BPL1MOD		REG(REGN_BPL1MOD)
   4.288 +#define REG_BPL2MOD		REG(REGN_BPL2MOD)
   4.289 +#define REG_DIWSTART	REG(REGN_DIWSTART)
   4.290 +#define REG_DIWSTOP		REG(REGN_DIWSTOP)
   4.291 +#define REG_DDFSTART	REG(REGN_DDFSTART)
   4.292 +#define REG_DDFSTOP		REG(REGN_DDFSTOP)
   4.293 +#define REG_VPOS		REG(REGN_VPOS)
   4.294 +#define REG_VPOSR		REG(REGN_VPOSR)
   4.295 +#define REG_VHPOS		REG(REGN_VHPOS)
   4.296 +#define REG_VHPOSR		REG(REGN_VHPOSR)
   4.297 +#define REG32_VPOSR		*(volatile uint32_t*)(REG_BASE_ADDR | REGN_VPOSR)
   4.298 +
   4.299 +#define REG_COLOR_PTR	((volatile uint16_t*)(REG_BASE_ADDR | REGN_COLOR0))
   4.300 +#define REG_COLOR0		REG(REGN_COLOR0)
   4.301 +#define REG_COLOR1		REG(REGN_COLOR1)
   4.302 +#define REG_COLOR2		REG(REGN_COLOR2)
   4.303 +#define REG_COLOR3		REG(REGN_COLOR3)
   4.304 +#define REG_COLOR4		REG(REGN_COLOR4)
   4.305 +#define REG_COLOR5		REG(REGN_COLOR5)
   4.306 +#define REG_COLOR6		REG(REGN_COLOR6)
   4.307 +#define REG_COLOR7		REG(REGN_COLOR7)
   4.308 +#define REG_COLOR8		REG(REGN_COLOR8)
   4.309 +#define REG_COLOR9		REG(REGN_COLOR9)
   4.310 +#define REG_COLOR10		REG(REGN_COLOR10)
   4.311 +#define REG_COLOR11		REG(REGN_COLOR11)
   4.312 +#define REG_COLOR12		REG(REGN_COLOR12)
   4.313 +#define REG_COLOR13		REG(REGN_COLOR13)
   4.314 +#define REG_COLOR14		REG(REGN_COLOR14)
   4.315 +#define REG_COLOR15		REG(REGN_COLOR15)
   4.316 +#define REG_COLOR16		REG(REGN_COLOR16)
   4.317 +#define REG_COLOR17		REG(REGN_COLOR17)
   4.318 +#define REG_COLOR18		REG(REGN_COLOR18)
   4.319 +#define REG_COLOR19		REG(REGN_COLOR19)
   4.320 +#define REG_COLOR20		REG(REGN_COLOR20)
   4.321 +#define REG_COLOR21		REG(REGN_COLOR21)
   4.322 +#define REG_COLOR22		REG(REGN_COLOR22)
   4.323 +#define REG_COLOR23		REG(REGN_COLOR23)
   4.324 +#define REG_COLOR24		REG(REGN_COLOR24)
   4.325 +#define REG_COLOR25		REG(REGN_COLOR25)
   4.326 +#define REG_COLOR26		REG(REGN_COLOR26)
   4.327 +#define REG_COLOR27		REG(REGN_COLOR27)
   4.328 +#define REG_COLOR28		REG(REGN_COLOR28)
   4.329 +#define REG_COLOR29		REG(REGN_COLOR29)
   4.330 +#define REG_COLOR30		REG(REGN_COLOR30)
   4.331 +#define REG_COLOR31		REG(REGN_COLOR31)
   4.332 +
   4.333 +/* ------ bits ------- */
   4.334 +#define SETBITS(x)	((x) | 0x8000)
   4.335 +#define CLRBITS(x)	(x)
   4.336 +
   4.337 +/* interrupt enable flags */
   4.338 +enum {
   4.339 +	INTEN_TBE		= 0x0001,
   4.340 +	INTEN_DSKBLK	= 0x0002,
   4.341 +	INTEN_SOFT		= 0x0004,
   4.342 +	INTEN_PORTS		= 0x0008,
   4.343 +	INTEN_COPPER	= 0x0010,
   4.344 +	INTEN_VERTB		= 0x0020,
   4.345 +	INTEN_BLITTER	= 0x0040,
   4.346 +	INTEN_AUDIO0	= 0x0080,
   4.347 +	INTEN_AUDIO1	= 0x0100,
   4.348 +	INTEN_AUDIO2	= 0x0200,
   4.349 +	INTEN_AUDIO3	= 0x0400,
   4.350 +	INTEN_RBF		= 0x0800,
   4.351 +	INTEN_DSKSYN	= 0x1000,
   4.352 +	INTEN_EXTER		= 0x2000,
   4.353 +	INTEN_MASTER	= 0x4000,
   4.354 +
   4.355 +	INTEN_ALL		= 0x7fff
   4.356 +};
   4.357 +
   4.358 +/* DMA control flags */
   4.359 +enum {
   4.360 +	DMA_AUD0		= 0x0001,
   4.361 +	DMA_AUD1		= 0x0002,
   4.362 +	DMA_AUD2		= 0x0004,
   4.363 +	DMA_AUD3		= 0x0008,
   4.364 +	DMA_AUDIO		= 0x000f,	/* all the above */
   4.365 +	DMA_DISK		= 0x0010,
   4.366 +	DMA_SPRITE		= 0x0020,
   4.367 +	DMA_BLITTER		= 0x0040,
   4.368 +	DMA_COPPER		= 0x0080,
   4.369 +	DMA_BPL			= 0x0100,
   4.370 +	DMA_MASTER		= 0x0200,
   4.371 +
   4.372 +	DMA_ALL			= 0x01ff
   4.373 +};
   4.374 +
   4.375 +/* Bitplane control */
   4.376 +enum {
   4.377 +	BPLCON0_ERSY	= 0x0002,
   4.378 +	BPLCON0_LACE	= 0x0004,
   4.379 +	BPLCON0_LPEN	= 0x0008,
   4.380 +	BPLCON0_GAUD	= 0x0100,
   4.381 +	BPLCON0_COLOR	= 0x0200,
   4.382 +	BPLCON0_DBLPF	= 0x0400,
   4.383 +	BPLCON0_HOMOD	= 0x0800,
   4.384 +	BPLCON0_BPU0	= 0x1000,
   4.385 +	BPLCON0_BPU1	= 0x2000,
   4.386 +	BPLCON0_BPU2	= 0x4000,
   4.387 +	BPLCON0_HIRES	= 0x8000
   4.388 +};
   4.389 +
   4.390 +#define BPLCON0_COUNT(x)	((x) << 12)
   4.391 +
   4.392 +#define CIAA_PA_FIR0	0x40
   4.393 +#define CIAA_PA_FIR1	0x80
   4.394 +
   4.395 +#endif	/* HWREGS_H_ */

     5.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     5.2 +++ b/src/inttypes.h	Tue Jul 25 08:17:34 2017 +0300
     5.3 @@ -0,0 +1,11 @@
     5.4 +#ifndef INTTYPES_H_
     5.5 +#define INTTYPES_H_
     5.6 +
     5.7 +typedef signed char int8_t;
     5.8 +typedef unsigned char uint8_t;
     5.9 +typedef short int16_t;
    5.10 +typedef unsigned short uint16_t;
    5.11 +typedef long int32_t;
    5.12 +typedef unsigned long uint32_t;
    5.13 +
    5.14 +#endif	/* INTTYPES_H_ */

     6.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     6.2 +++ b/src/main.c	Tue Jul 25 08:17:34 2017 +0300
     6.3 @@ -0,0 +1,105 @@
     6.4 +#include <stdio.h>
     6.5 +#include <proto/exec.h>
     6.6 +#include <exec/memory.h>
     6.7 +#include "inttypes.h"
     6.8 +#include "mouse.h"
     6.9 +#include "hwregs.h"
    6.10 +
    6.11 +#define WIDTH	480
    6.12 +#define HEIGHT	128
    6.13 +
    6.14 +#define BPLSIZE		(WIDTH / 8 * HEIGHT)
    6.15 +#define MAX_HSCROLL	(WIDTH - 320)
    6.16 +#define HMOD		(MAX_HSCROLL / 8)
    6.17 +
    6.18 +static uint16_t prev_intena, prev_intreq, prev_adkcon, prev_dmacon;
    6.19 +
    6.20 +extern uint32_t backdrop;
    6.21 +
    6.22 +int init(void);
    6.23 +void cleanup(void);
    6.24 +void wait_vpos(int x);
    6.25 +void wait_vblank(void);
    6.26 +
    6.27 +int main(void)
    6.28 +{
    6.29 +	int x, y;
    6.30 +
    6.31 +	if(init() == -1) {
    6.32 +		return 1;
    6.33 +	}
    6.34 +
    6.35 +	while(!mouse_state(&x, &y)) {
    6.36 +		wait_vblank();
    6.37 +		REG32_BPL1PT = (uint32_t)&backdrop;
    6.38 +	}
    6.39 +
    6.40 +	cleanup();
    6.41 +	return 0;
    6.42 +}
    6.43 +
    6.44 +int init(void)
    6.45 +{
    6.46 +	int i, x, y, bit;
    6.47 +	unsigned char *fbptr;
    6.48 +	unsigned char tmp;
    6.49 +
    6.50 +	Forbid();
    6.51 +
    6.52 +	prev_dmacon = REG_DMACONR;
    6.53 +	REG_DMACON = CLRBITS(DMA_ALL);
    6.54 +
    6.55 +	prev_intena = REG_INTENAR;
    6.56 +	REG_INTENA = SETBITS(INTEN_ALL);
    6.57 +
    6.58 +	prev_intreq = REG_INTREQR;
    6.59 +	prev_adkcon = REG_ADKCONR;
    6.60 +
    6.61 +	REG_BPLCON0 = BPLCON0_COUNT(1) | BPLCON0_COLOR;
    6.62 +	REG_BPLCON1 = 0;	/* h-scroll */
    6.63 +	REG_BPL1MOD = HMOD;
    6.64 +	REG_BPL2MOD = HMOD;
    6.65 +	REG_DIWSTART = 0x2981;
    6.66 +	REG_DIWSTOP = 0x29c1;
    6.67 +	REG_DDFSTART = 0x38;
    6.68 +	REG_DDFSTOP = 0xd0;
    6.69 +
    6.70 +	/* populate palette */
    6.71 +	REG_COLOR0 = 0;
    6.72 +	REG_COLOR1 = 0xfff;
    6.73 +
    6.74 +	wait_vblank();
    6.75 +	REG32_BPL1PT = (uint32_t)&backdrop;
    6.76 +
    6.77 +	REG_DMACON = SETBITS(DMA_BPL | DMA_MASTER);
    6.78 +
    6.79 +	return 0;
    6.80 +}
    6.81 +
    6.82 +void cleanup(void)
    6.83 +{
    6.84 +	REG_DMACON = CLRBITS(DMA_ALL);
    6.85 +	REG_DMACON = SETBITS(prev_dmacon);
    6.86 +
    6.87 +	REG_INTREQ = CLRBITS(0x7fff);
    6.88 +	REG_INTREQ = SETBITS(prev_intreq);
    6.89 +
    6.90 +	REG_ADKCON = CLRBITS(0x7fff);
    6.91 +	REG_ADKCON = SETBITS(prev_adkcon);
    6.92 +
    6.93 +	REG_INTENA = CLRBITS(INTEN_ALL);
    6.94 +	REG_INTENA = SETBITS(prev_intena);
    6.95 +
    6.96 +	Permit();
    6.97 +}
    6.98 +
    6.99 +void wait_vpos(int x)
   6.100 +{
   6.101 +	x <<= 8;
   6.102 +	while((REG32_VPOSR & 0x1ff00) < x);
   6.103 +}
   6.104 +
   6.105 +void wait_vblank(void)
   6.106 +{
   6.107 +	wait_vpos(300);
   6.108 +}

     7.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     7.2 +++ b/src/mouse.c	Tue Jul 25 08:17:34 2017 +0300
     7.3 @@ -0,0 +1,69 @@
     7.4 +#include <stdlib.h>
     7.5 +#include "mouse.h"
     7.6 +#include "inttypes.h"
     7.7 +
     7.8 +
     7.9 +#define REG_BASE_ADDR	0xdff000
    7.10 +#define REGNO_JOY0DAT	0x00a
    7.11 +#define REG_JOY0DAT *(volatile uint16_t*)(REG_BASE_ADDR | REGNO_JOY0DAT)
    7.12 +#define REG_CIAA_PORTA	*(volatile uint8_t*)0xbfe001
    7.13 +
    7.14 +#define CIAA_PA_FIR0	0x40
    7.15 +#define CIAA_PA_FIR1	0x80
    7.16 +
    7.17 +static int xrng[2] = {0, 320};
    7.18 +static int yrng[2] = {0, 240};
    7.19 +
    7.20 +void set_mouse_bounds(int x0, int y0, int x1, int y1)
    7.21 +{
    7.22 +	xrng[0] = x0;
    7.23 +	xrng[1] = x1;
    7.24 +	yrng[0] = y0;
    7.25 +	yrng[1] = y1;
    7.26 +}
    7.27 +
    7.28 +int mouse_state(int *x, int *y)
    7.29 +{
    7.30 +	mouse_pos(x, y);
    7.31 +	return mouse_bnstate();
    7.32 +}
    7.33 +
    7.34 +int mouse_bnstate(void)
    7.35 +{
    7.36 +	/* TODO: handle right mouse button */
    7.37 +	return (REG_CIAA_PORTA & CIAA_PA_FIR0) ? 0 : 1;
    7.38 +}
    7.39 +
    7.40 +/* TODO: for when I feel like making a proper mouse handler
    7.41 + * use vblank interrupt vector to read the mouse register once
    7.42 + * and have mouse_pos (and friends) simply access the global data
    7.43 + */
    7.44 +void mouse_pos(int *x, int *y)
    7.45 +{
    7.46 +	static int xpos, ypos;
    7.47 +	static int prev_xcount, prev_ycount;
    7.48 +	int xcount, ycount, dx, dy;
    7.49 +	uint16_t raw = REG_JOY0DAT;
    7.50 +
    7.51 +	xcount = raw & 0xff;
    7.52 +	ycount = raw >> 8;
    7.53 +
    7.54 +	dx = xcount - prev_xcount;
    7.55 +	dy = ycount - prev_ycount;
    7.56 +
    7.57 +	if(abs(dx) > 127) dx = 255 - (xcount - prev_xcount);
    7.58 +	if(abs(dy) > 127) dy = 255 - (ycount - prev_ycount);
    7.59 +	prev_xcount = xcount;
    7.60 +	prev_ycount = ycount;
    7.61 +
    7.62 +	xpos += dx;
    7.63 +	ypos += dy;
    7.64 +
    7.65 +	if(xpos < xrng[0]) xpos = xrng[0];
    7.66 +	if(ypos < yrng[0]) ypos = yrng[0];
    7.67 +	if(xpos >= xrng[1]) xpos = xrng[1] - 1;
    7.68 +	if(ypos >= yrng[1]) ypos = yrng[1] - 1;
    7.69 +
    7.70 +	*x = xpos;
    7.71 +	*y = ypos;
    7.72 +}

     8.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     8.2 +++ b/src/mouse.h	Tue Jul 25 08:17:34 2017 +0300
     8.3 @@ -0,0 +1,9 @@
     8.4 +#ifndef MOUSE_H_
     8.5 +#define MOUSE_H_
     8.6 +
     8.7 +int mouse_state(int *x, int *y);
     8.8 +
     8.9 +int mouse_bnstate(void);
    8.10 +void mouse_pos(int *x, int *y);
    8.11 +
    8.12 +#endif	/* MOUSE_H_ */